AUTHORS
=======
* Kai Mertens (See source file for contact information.)
___
(See source file for copyright information.)
Copying
=======
Zerocat Coreboot Machines ships copyrighted work.
See [AUTHORS][] for a list of people which have contributed.
Zerocat Coreboot Machines is free software. It makes use of free software
approved licenses only and should be freely distributable:
* [GNU General Public License][GNU GPL]
* [GNU Free Documentation License][GNU FDL]
* [CreativeCommons Attribution-ShareAlike License][CC BY-SA]
Authorship, copyright and license information may be provided in more
detail on a per-folder and/or per-file basis. Check the sources.
Please report a bug if you find the distribution hindered by any
obstacle. See [Zerocat Website][] for contact information.
[AUTHORS]: ../doc/AUTHORS.md
[GNU-GPL]: ../doc/GNU-GPL.md
[GNU-FDL]: ../doc/GNU-FDL.md
[CC BY-SA]: https://creativecommons.org/licenses/by-sa/4.0/
[Zerocat Website]: http://www.zerocat.org/
___
(See source file for copyright information.)
MAINPAGE
========
Turn a small, but interesting set of ThinkPad laptops into very
satisfying free software devices! Create new firmware, modify your
hardware, install a fully free/libre operating system, and use it
according to best practice recommendations.
Worked Example: Zerocat X230-Tablet
-----------------------------------
![X230 Tablet with Zerocat Boot Menu][!DSCN9414-detail.jpg]
Supported Machines
------------------
* T400², T400s, T500, T420, T420s, T520/T520i³, T430, T430s, T530, W530
* X200, X200s, X200t, X201°, X220, X220i, X230, X230s, X230t, X1 Carbon Gen1
* T60, T60 (ATI Mobility Radeon X1300), T60 (ATI Mobility Radeon X1400)
* X60, X60s, X60t
* X60_32bit, X60s_32bit, X60t_32bit
¹ The set of *frequently tested* laptops is much smaller!
² TFT 1440×900px is supported by coreboot@4.8.1 only.
³ Avoid freezes with linux kernel option `intel_idle.max_cstate=2`.
° Do not touch the IME firmware.
Feature Chart of Zerocat’s Firmware
-----------------------------------
* tuned flash regions and access permissions
* tuned values for bits *MeDisable* and *AltMeDisable*
* deleted (X200 etc.) or drastically truncated Intel ME firmware blob
(0x15000 bytes)
* fully configured Ethernet controller (global Disable Bit, custom MAC
Address, disabled PXE Boot Agent)
* huge BIOS region with Coreboot File System
- extended security with cleared DRAM upon regular boot
- CPU microcode update blob included upon request
- Coreboot Option Table, configurable during runtime
- Zerocat Boot Menu with...
+ LUKS decryption support
+ verbose message feedback
+ keymap selection utility
+ ...
- integrated toolchain git commit reference
- GRUB2 authorization scheme and rescue terminal
- secondary payloads NVRAMCUI, Coreinfo, SeaBIOS
- background image with logo
- ...
Tools and their Versions
------------------------
In general, these project versions are used as default:
* coreboot@4.14
* grub@grub-2.06
* seabios@rel-1.14.0
Some fallback versions are still supported:
* coreboot@4.8.1
* grub@2.02
Operating Systems
-----------------
This project puts extra focus on fully free/libre operating systems:
1. GNU Guix System
This system can be run from fully encrypted partitions.
Files `../templates/zerocat-system-*.scm` might help you to
configure your GNU Guix System right after installation.
Utility script `../util/grub-mkconfig-coreboot-guix.sh` should help
you to set up an optimized grub configuration file for GNU Guix
System. This file works well with Zerocat’s boot menu.
2. Trisquel GNU/Linux-libre
The default installer will set up an _unencrypted root partition_.
Trisquel is required by this project and its toolchain, as the GNU
Ada-Compiler is needed to build the coreboot firmware.
3. Parabola GNU/Linux-libre
This system can be run from fully encrypted partitions.
Utility script `../util/setup-parabola.sh` helps you to set up a
fully configured Parabola System, optionally encrypted.
4. Hyperbola GNU/Linux-libre
This system can be run from fully encrypted partitions.
Utility script `../util/grub-mkconfig-coreboot-hyperbola.sh`
creates an optimized grub configuration file for encrypted
Hyperbola. This file works well with Zerocat’s boot menu.
See `../doc/supported-distros.md` for more test results.
Get Started
-----------
To get started, see:
1. `../doc/README.md`
2. `../doc/MAINPAGE.md`
3. `../doc/toolchain.md`
4. `../doc/x220-x230-microphone-hack.md`
5. `../doc/best-practice.md`
Accessories
-----------
Once you have liberated your laptop, protect it! See
`../doc/sleeves.md` to see how to make a sleeve for it.
Disclaimer
----------
These sources are distributed in the hope that they will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Proceed with care, good luck!
Please report bugs.
[!DSCN9414-detail.jpg]: ../images/DSCN9414-detail.jpg "X230 Tablet with Zerocat Boot Menu"
___
(See source file for copyright information.)
NEWS
====
Changes ...
-----------
Changes between v0.15.0 and v0.16.0
-----------------------------------
* Update `templates/zerocat-system-i686.scm` to use recent guix
channel.
* Update image of worked example: X230t with boot menu
* Script `gen-rom-zerocat.sh`: Use shorter target folder name, write
`specfile.md`.
* GNU Guix System declaration templates provide a new kernel option for
T520/T520i, yet as a comment.
* Script `src/gen-payload-grub.sh` now comes with option
`--config-antifreeze`, which should be used on T520/T520i machines so
that entry “Search Kernel Linux” passes `intel_idle.max_cstate=2` to
the kernel.
* **Update for t520i target:** Same machine as tested below freezes with
Trisquel9 x86_64. This kernel linux-libre boot parameter seems to
help:
intel_idle.max_cstate=2
Please compare to: <https://ticket.coreboot.org/issues/121>
* Perform project cleanup.
- Add some `patch` files.
- Refine `../doc/MAINPAGE.md`
- Move configuration templates to `templates/`.
- Sort guix’ declaration templates into `templates/` as well.
- Drop superseded templates for coreboot@4.12, grub@grub-2.04,
seabios@rel-1.12.0 and seabios@rel-1.13.0.
* Apply some small fixes for target w530.
* Review, improve and rename GNU Guix System declaration templates in
`util/gnu-guix-system/`.
- refine license header
- add channel information
- improve usage information
- set up two user accounts: user0 (admin) and user1 (normal user)
- rewrite comments using markdown syntax
- mark failing packages for i686 architecture / 32bit CPU mode,
provide fallback packages
* Fix up `gen-rom-zerocat.sh` for targets t530 and w530.
* Grant more GbE configuration options to targets t520 and t520i.
* Add new target: t520i; status: TESTED with coreboot@4.14
In general, the T520 machines are known to crash unpredictably with
coreboot firmware. If you have a T520/T520i available, please try
the Zerocat ROM with target `t520` and check if it works fine,
long-term. Any workaround to avoid crashes? Upon success, please
report! We can then update the `t520` target. Thank You!
This customer’s T520i seems to work fine with coreboot@4.14. – so
let’s set up a dedicated target `t520i`. But get prepared for
_sudden crashes with both RAM slots populated_, for instance!
**Check your RAM to be properly socketed!!**
**Try with top-side slot populated only!**
T520i device test conditions:
- Standard firmware region access permissions
- ME firmware region drastically shrunk
- BIOS region augmented, containing coreboot@4.14 and CPU microcode
updates
- Default GbE configuration / GbE disabled
- **One RAM slot populated only (internal, top side)**:
Samsung 4GB 1Rx8 PC3L–12800S-11-13-B4 (M471B5173EB0–YK0 1545)
- Fingerprint Reader removed
- Microphone board removed
- No CD-ROM
- No internal Harddisk/SSD
- No internal WiFi
- fully encrypted GNU Guix System on external SSD via USB/SATA Adapter
- powered by simple AC-Adapter
- TFT-Screen 1920×1080px
- Xfce4 Desktop, simple use, and terminal with simple process,
running for hours: `watch date`
- Terminal, running `find` with different options.
- Screensaver works fine
- Suspend/Resume works fine
* Add new targets: x60[st]_32bit; status: UNTESTED
These targets come with more payloads, e.g.: Tint and Memtest86+
* Add new target x1_carbon_gen1; status: TESTED
* File `src/setup-toolbox.sh`:
Help function `retrieve_grub()` to find `freetype2.pc` on x86_64
architecture.
Changes between v0.14.0 and v0.15.0
-----------------------------------
* Documentation build process comes with well structured screen output.
* Successfully tested with commit 0e1ca794: X230
* Add new target w530; status: UNTESTED
* File `src/config-templates/grub@2.02_zerocat.cfg`
In verbose mode, add advisory output about mapped root-partition,
when searching the kernel linux directly.
Refine menu entries such that the type of volumes involved is part
of the title.
Add menuentry to explicitly test and decrypt LUKS Header on USB
volumes.
* Migration of the documentation build system has started.
The doxygen documentation will be dropped in favor of a simpler,
self made build system as offered by: zerocat-project-template v0.0.1
The doxygen documentation moved from `doc/` to `doc-doxygen`, and
will be kept until migration has been accomplished.
* Some more ThinkPad targets have been added, e.g.:
- x220i
- x230s
- t420s
Toolchain status for these machines: UNTESTED
* The toolchain now uses updated project versions, e.g.:
- coreboot@4.14
- grub@grub-2.06
- seabios@rel-1.14.0
Toolchain testing still is work in progress.
___
(See source file for copyright information.)
README
======
Project Goal
------------
The goal of Zerocat Coreboot Machines is to help you turn ThinkPad
laptops into very satisfying free software devices: Create free
firmware images (but use blobs if required), modify your hardware,
install a fully free/libre operating system, improve configurations and
follow best practice recommendations.
Paths
-----
All paths within this document are relative in respect to the original
location of this source file, which is located in the project’s `doc/`
folder.
Prerequisites
-------------
If you are on GNU Guix System, create your environment:
guix environment --pure -m ../guix/manifest.scm
Otherwise, check the manifest file and install the listed packages with
the package manager of your distro. Adapt package names as required.
Make Documentation
------------------
To build the documentation, type:
make -C ../doc
To get a full list of available targets, type:
make -C ../doc help
Contributing
------------
Once you have contributed, add yourself to [AUTHORS][].
[AUTHORS]: ../doc/AUTHORS.md
### Documentation Files
In order to enrich this documentation:
* add more `*.md` markdown text files to `../doc/`
* maintain copyright footer within new files
* add more folders, images or other files
... and adapt `../doc/Makefile` to produce nice output.
In case more tools are needed, don't forget to update
`../guix/manifest.scm`.
### Shell Scripts
If you intend to write shell scripts, use this skeleton to make them
work for GNU Guix:
#!/bin/sh
# Re-exec if we are not using Bash or are using Bash in POSIX mode.
if [ -z "$BASH" ] || [ "$BASH" = "/bin/sh" ]; then
bash=`command -v bash`
if [ -z "$bash" ]; then
echo "Couldn't find Bash, sorry!"
exit 1
else
exec "$bash" "$0" "$@"
fi
fi
# We're using Bash now.
set -o errexit
set -o nounset
set -o pipefail
# Your code goes here ...
### Code Files
This project may ship non-code, graphic sources, which cannot be
covered by the standard GNU General Public License. The license header
for code source files thus has been adapted accordingly, please use it
if you intend to write code:
Zerocat Coreboot Machines --- Create very satisfying
free software devices.
Copyright (C) 2021 Authors of Zerocat Coreboot Machines
This file is part of Zerocat Coreboot Machines.
This file is free software: you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License,
or (at your option) any later version.
This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Zerocat Coreboot Machines.
If not, see <http://www.gnu.org/licenses/>.
Version Tags
------------
Within this project’s git repository, versions are tagged according to
the following pattern:
v<major>.<minor>.<revision>
* major – The resulting product is a major change or upgrade.
* minor – Additional functionality or new features are introduced.
* revision – Bug fixes, minor changes, graphical stuff.
___
(See source file for copyright information.)
GbE PHY Configuration i82579LM/V
================================
82579LM/V GbE PHY Configuration for Intel 6 Series Express Chipset.
Specifications
--------------
File: `../templates/i82579lmv-gbe-6series.spec`
To be used with coreboot’s `bincfg` utility.
Do not change names for `macaddress`, `l1_gbedis` and
`checksum_gbe`, these words are updated by the toolchain.
Settings
--------
File: `../templates/i82579lmv-gbe-6series.set`
To be used with coreboot’s `bincfg` utility.
Seems to be applicable for Intel 7 Series Express Chipset as well.
Refer to `../templates/i82579lmv-gbe-6series.spec` for
applicable namespace.
* Bit `l1_gbedis` will be set with `gen-rom-zerocat.sh --gbe disable`,
thus disabling GbE operation. The MAC Address will be cleared to
`ffffffffffff`.
* A custom MAC Address will be set with `gen-rom-zerocat.sh --gbe
set_<macaddr>` and `<macaddr>` provided as a twelve digit,
hexadecimal value without colons. Common first three octets are:
- `00aa00xxxxxx` (Intel orig, as suggested by GbE datasheet)
- `00a0c9xxxxxx` (Intel new, as suggested by GbE datasheet)
- `3c970exxxxxx` (found on Lenovo X230 and family)
According to IEEE standards, a MAC Address of `000000000000`
shall not be used.
Bit `l1_gbedis` will be cleared, thus enabling the GbE
controller.
* The Printed Board Assembly Number (PBA Number) is reset to
`0xffffffff`. This should make sense, as any else number would not
necessarily match the physical product.
* PXE Boot Agent options are disabled.
* Bit 6 of word 0x19 is set in order to indicate a valid checksum,
although this should be done by `bincfg` instead, when it updates
the `checksum_gbe` word.
* Some more values are set according to the defaults as mentioned in
the datasheet, not to the values that are detected on a flash
readout. See inline comments.
___
(See source file for copyright information.)
How To Modify The Intel Flash Descriptor
========================================
Most Intel Machines use their onboard flash chip to hold not just BIOS
firmware, instead different firmare regions are set up to give space
for other firmware as well. The first 4096 Bytes of that chip hold
Intel’s description table which exactly describes position, size and
access restrictions of these regions. This table is called “Intel
Firmware Descriptor” or “Intel Flash Descriptor”, in short: “IFD”.
Once you are dealing with coreboot or libreboot, different necessities
arise to modify this description table.
Region ME Deleted
-----------------
On libreboot compatible devices (i.e. X200, T400, T500, etc.), you are
likely to delete region ME, the firmware region reserved to hold the
proprietary firmware update for the integrated Intel Management Engine,
a powerful controller on board. But with a deleted region, more space
is available and should get reassigned to region BIOS, which holds your
new coreboot BIOS firmware replacement.
The Libreboot project already did that work, it offers a tool called
`ich9gen` to create a modified firmware descriptor which can just be
copied into the new coreboot ROM by means of the `dd` command. (This
tool generates firmware for region GbE in the same go, it is bundled
together. However, you might use the `dd` command again to seperate
both regions in case you need to.)
Retrieve the sources of the libreboot project:
$ git clone https://notabug.org/libreboot/libreboot.git
$ cd libreboot
Let’s checkout at the latest release:
$ git checkout r20160907
$ cd resources/utilities/ich9deblob
$ make
Use the correct MAC address of your machine. It is usually stated on a
sticker at the systemboard’s second RAM socket.
$ ./ich9gen --macaddress xx:xx:xx:xx:xx:xx
Do not use option `--mac-address` by mistake, as this will generate a
GbE Configuration with a default MAC Address without warning the user.
Do not omit the colons. Replace ‘xx’ with your hexadecimal values.
This will generate some `*.bin` files and "How to Use" messages, i.e.:
descriptor and gbe successfully written to the file: ich9fdgbe_8m.bin
Now do: dd if=ich9fdgbe_8m.bin of=libreboot.rom bs=1 count=12k conv=notrunc
(in other words, add the modified descriptor+gbe to your ROM image)
You should update your coreboot.rom with the apropriate `dd` command
*as a last action* on it.
Region ME Cleaned
-----------------
More recent machines (i.e. X220, X230, T430, T430s, etc.) do not allow
you to delete region ME completely, unfortunately. However, the
ME_Cleaner script is able to delete a signifcant number of sections of
the firmware code. As a result, the IME controller boots up – but stays
hang up in its Bring-Up-Phase. Hopefully it can't do any harm.
### Shrink Binary of Region ME
Once `me_cleaner.py` cleaned, relocated and truncated the ME firmware,
it might get shrunk even more. ME_Cleaner’s log file suggests a new
size, but this seems to be even more reducable by around 3× 4096 Bytes.
Use `hexdump -C` to look for the last sector containing code in
ME_Cleaner’s binary output and determine the required minimal size,
while maintaining flash erase sector size granularity. The `dd` command
should be the right tool to create a smaller binary file of the
truncated *and* shrunk ime firmware.
### Create and Fix Binary of Region IFD
But useless to use this binary with coreboot without having created a
new firmware descriptor binary:
Dump the flash layout with `ifdtool -f` and create a modified one, see
Example A below.
Create a new, working flash descriptor with `ifdtool -n` *and* fix Byte
Nº 0x51 (81 in decimal) with the value found in the previously
extracted flash descriptor binary `flashregion_0_flashdescriptor.bin`,
0x1f for instance. The `dd` command helps you to copy that byte’s
value. See Example B to see how the new flash descriptor dump should
differ the default one.
#### Example A: Modify X230 Firmware Layout
Use `ifdtool -f` to extract the default layout, e.g.: X230
00000000:00000fff fd
00500000:00bfffff bios
00003000:004fffff me
00001000:00002fff gbe
Modify the layout file. This is what can be used on an **X230**:
00000000:00000fff fd
00001000:00002fff gbe
00003000:00017fff me
00018000:00bfffff bios
Size of ME-Region is 0x15000 Bytes instead of 0x18000 as suggested by
`me_cleaner.log`. In comparison to the original flash layout on an
X230, region BIOS has been increased – region ME has been decreased –
by 0x4E8000 Bytes.
#### Example B: Compare X230 Descriptor Dumps
The `diff -y` command helps you to compare dumps (created with `ifdtool
-d`) of the default descriptor and the new, fixed one. They should not
differ but in four lines as listed:
Found Region Section Found Region Section
FLREG0: 0x00000000 FLREG0: 0x00000000
Flash Region 0 (Flash Descriptor): 00000000 - 00000fff Flash Region 0 (Flash Descriptor): 00000000 - 00000fff
FLREG1: 0x0bff0500 | FLREG1: 0x0bff0018
Flash Region 1 (BIOS): 00500000 - 00bfffff | Flash Region 1 (BIOS): 00018000 - 00bfffff
FLREG2: 0x04ff0003 | FLREG2: 0x00170003
Flash Region 2 (Intel ME): 00003000 - 004fffff | Flash Region 2 (Intel ME): 00003000 - 00017fff
FLREG3: 0x00020001 FLREG3: 0x00020001
Flash Region 3 (GbE): 00001000 - 00002fff Flash Region 3 (GbE): 00001000 - 00002fff
FLREG4: 0x00001fff FLREG4: 0x00001fff
Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused
### Use Both Binaries with Coreboot
Both newly created binaries of Region 0 and Region 2 should be used for
the new `coreboot.rom` by means of `ifdtool`.
Toolchain Scripts
-----------------
These procedures are applied by @ref gen-rom-zerocat.sh, which should
help you to do it safely via `--ime clean` or `--ime xtrunc`. Use
option `--usage` to get invocation examples. See source code for
details.
___
(See source file for copyright information.)
Sleeves
=======
How to make a sleeve for your Zerocat Laptop?
Images
------
![Selfmade Sleeves with Cat Logo and Wrist Loop][!DSCN9793-detail.jpg]
![Detail: Hook-And-Loop Tape][!DSCN9816-detail.jpg]
![Detail: The inner bottom Line][!DSCN9853-detail.jpg]
![Detail: The applied Cat Logo][!DSCN9845-detail.jpg]
Tools
-----
* damp iron
* box with pins
* tailor’s scissors
* scissors for paper/cardboard
* tailor’s chalk, white and blue
* table with damping cloth and towel
* sewing machine with needle, size ‘90’
* piece of wood, 40cm of length, 1cm thickness
Materials
---------
* stiff, flat cardboard
* strong cloth, i.e. canvas made of cotton, in two colors,
a lighter color for the inner part, a stronger color for the outer
* adhesive cotton wool, thickness 4mm, i.e. “Vlieseline H640”
* adhesive repair botch, made of cotton
* hook-and-loop tape (polyester)
* belt, made of cotton or polyester
* cotton thread, good quality!
Be careful with material made of polyester (i.e. hook-and-loop tape,
wrist belt) when ironing!
Cardboard Templates
-------------------
Take the cardboard and cut out your rectangular template:
* ZC-X230 cardboard: 34.5 × 28.5cm
- Dimensions of an X230 with small battery: 30.5 × 20.5 cm
- Dimensions of an X230 with extended battery: 30.5 × 22.5 cm
* ZC-X200 cardboard: 33.5 × 29.0cm
- Dimensions of an X200 with small battery: 29.5 × 21.0cm
- Dimensions of an X200 with extended battery: 29.5 × 23.0cm
* ZC-X200t cardboard: 34.0 × 32.0cm
- Dimensions of an X200t with small battery: 29.5 × 23.0cm
- Dimensions of an X200t with extended battery: 29.5 × 25.5cm
How-To
------
1. Wash the canvas by hand, separate strong colors. Let it dry over night.
2. Clean the table, cover it with damping cloth or towel.
3. Iron the canvas, identify face and back side.
4. Put the canvas with its face onto the table.
5. Cut out four rectangular pieces of canvas, two of each color.
Use the cardboard template,
align the wood along to the edges,
draw with the chalk along the wood in order to add 1cm space.
Use the tailor’s scissors to perform the cutout.
7. Take the two pieces of dark colored canvas and apply adhesive
cotton wool on its back.
8. Combine two pieces of differently colored canvas and sew the top
edge of the sleeve.
Place the differently colored pieces of canvas onto each-other,
face to face, and turn the cotton wool upside. Maybe, turning
downside is better? Sew along one edge while keeping a distance of
1cm. That will be one of your sleeve’s top edges, so please locate
the edge correctly. On your sewing machine, use step size ‘2’. Push
the backwards button at the beginning and end of the line to fix
the thread.
Repeat this step once.
9. Now turn the flaps of each newly created piece such that you can
see the top edge as how it will be visible later. Iron it carefully
to form a clean, sharp edge.
10. Take the hook-and-loop tapes and cut a pieces of 3cm length, each.
Place one snippet onto the lighter canvas, align it with the joint
in parallel with a distance of 8 millimeters. Take care that you
match the center of the canvas, otherwise the two snippets will
fail to match on each-other when it comes to close the sleeve later
on.
11. Select zig-zag style, reduce step width to less than ‘1’, sew along
the snippet edges. When approaching the corners, make sure the
needle hits the outer corner of the zig-zag, release the foot, turn
90 degrees, press the foot down again and continue. Drive the
machine manually to achieve exact results. Double check the
parallel alignment of the snippet, as it tends to move while being
sewed. Don't forget to fix the threads by pushing the machine’s
revert button. Cut the threads when done. Reapply straight sewing
pattern, reset step width back to ‘2’.
12. Now place the two two-colored pieces of canvas onto each other,
face to face. Carefully adjust their positions to match, especially
the joint lines and the hook-and-loop snippets. Color #1 should now
face color #1, and color #2 should face color #2.
13. Be aware that your are going to sew around, along the edges,
keeping 1cm distance. But first fix the canvas fabrics with a bunch
of pins along the sewing route, now. Place the pins rectangular to
the route, so that they won’t interfere the sewing procedure later
on.
14. Turn the work and place the lighter colored part in front of you.
The edge that you are facing now will form the inner bottom of your
sleeve. Be aware: This edge must be sewed and closed as a last
step, as we need a hole to turn the sleeve inside-out.
15. Place the wrist loop and mind the position.
From your belt material, cut a piece of about 30cm length. Put one
end onto the other to form a loop. Press the loop flat and slip it
carefully between the strong colored parts of the combined sheets
of canvas, at one of the side edges. To get some practice now,
select an angular position, such that the loop – hidden between the
canvas – crosses the line of the top edges. A small part of the
belt should be visible outside, shaped triangular due to the
inclined position, its shortest edge should be not less than 5mm.
The distance between belt and the joint of different colored
canvases should be about not less than 1.0cm. Mind this position
and remove the loop. We will re-place it carefully later on, while
approaching with the sewing machine.
16. Now sew all around.
Locate the needle of your sewing machine onto the bottom line in
front of you, facing the left corner with a distance of 4cm. Start
sewing towards that corner while keeping the usual distance of 1cm
along the edge of the canvas. As usual, press the backwards button
shortly to fix the thread at the start.
When approaching the corner, stop sewing by pedal. Approach some
last steps by driving the machine manually until the needle hits
the corner exactly.
Now release the foot of the needle, turn the canvas carefully by 90
degrees, press the foot down again, and continue with sewing by
pedal. Again maintain the 1.0cm distance along the edge of the
canvas.
You are now heading towards the joint of the differently colored
parts of the canvases while being on the lighter colored part.
Stop sewing at a distance of some centimeters towards the joint.
Now remind the previous placement of the wrist loop and relocate it
thoroughly.
Continue with sewing, carefully cross the joint, and carefully
cross the belt.
Keep on going towards the next edge, turn around by 90 degrees
again as you did before, sew the bottom line of the outer sleeve,
turn again at the edge, and keep on going towards the joint again.
Now cross the joint a second time but pay attention to the correct
placement of the extra canvas underneath! If the canvas or the
cotton whool flips up the wrong way, release the foot, place the
cloth correctly and continue sewing.
You are now heading towards the last corner. At the corner, turn 90
degrees again, continue but stop after 4cm and press the backwards
button to fix the thread at the end of the line, cut the threads.
The *bottom line should now be incomplete*, leaving an aperture big
enough to let your hand pass through.
Locate the line part that is crossing the belt under the machine’s
foot again. Turn the sewing pattern from straight into zig-zag,
reduce the step width to ‘1’. Sew the across the belt now, but take
care to not sew beyond the existing, straight line. Please use the
backwards button again to fix the thread at the start and at the
end of this short line. Cut the threads. Take the tiny triangular
flaps and fip the backwards over the just created zig-zag line.
Apply another zig-zag, but take again care not to cross the
existing, straight line. Cut the threads. Done.
17. Turn the sleeve inside-out.
Take the tailor’s scissors and clean your work. Cut strayed threads
and plies, cut the corners carefully by 45 degrees, but not too
close at the edge point of the lines.
Slip your hand into the sleeve using the bottom line aperture and
turn the sleeve inside-out. Invest some careful efforts to turn the
dark colored corners, but don't pay too much attention to the light
colored ones.
Iron the bottom aperture to form a clean edge. Measure the lenght
of the aperture and cut a stripe of adhesive cotton whool
accordingly, its width should be around 10cm. Fold that stripe
along its length in the center, keep the adhesive part outside.
Slip the stripe into the aperture and iron it carefully when it is
placed correctly. The folded wool should not be visible outside of
the aperture – in contrary, it should be hidden like 3mm along the
edge. This stripe will provide some damping of the sleeve bottom
thus protecting the laptop when it is slipped in.
Finally, close the aperture by sewing along the bottom edge,
keeping a distance of only 3mm.
Now sink the lighter part of the sleeve into the darker, outer
part. Move, pull and twist the canvas until it fits into place and
forms a rectangular sleeve. Put some damping cloth onto it and
apply some ironing.
18. Apply the Zerocat branding.
Take an adhesive repair botch and cut out the cat logo by means of
the tailor’s scissors. A mirrored paper template of the logo will
help you to find the correct shape. Place the cat onto the sleeve
in a nice way, not too close to the edges. Cover the sleeve with
some damping cloth, and apply some ironing for about 20 seconds.
Keep moving the iron slightly, otherwise it will leave a footprint
which will be hard to erase from the canvas later on.
19. Let the sleeve – and the cat – cool down.
Done, your sleeve is ready!
Maintenance
-----------
As the canvas has been washed already, you should be safe to wash the
sleeve by hand without experiencing discoloration. The long-term
reliability of the applied logo has not yet been tested, though. It
might get loose.
[!DSCN9793-detail.jpg]: ../images/DSCN9793-detail.jpg "Selfmade Sleeves with Cat Logo and Wrist Loop"
[!DSCN9816-detail.jpg]: ../images/DSCN9816-detail.jpg "Detail: Hook-And-Loop Tape"
[!DSCN9853-detail.jpg]: ../images/DSCN9853-detail.jpg "Detail: The inner bottom Line"
[!DSCN9845-detail.jpg]: ../images/DSCN9845-detail.jpg "Detail: The applied Cat Logo"
___
(See source file for copyright information.)
Supported Distros
=================
USB Media
---------
Zerocat’s Boot Menu offers three different paths to boot USB
live/installation media:
1. Coreboot-GRUB2 -> USB -> Distro’s Grub2 Configuration File
2. Coreboot-GRUB2 -> USB -> Distro’s Isolinux Configuration File
3. Coreboot-GRUB2 -> SeaBIOS Payload -> USB -> Distro’s suggested boot path
See this table of tested **USB installation media**:
Distro Applicable Boot Path
------ --------------------
GNU Guix System v1.2.0² 1 (grub.cfg), 3 (via SeaBIOS)
Parabola Live Media – LXDE-OpenRC² 2 (isolinux.cfg), 3 (via SeaBIOS)
Hyperbola Live Media – Milky Way v0.3.1² 2 (isolinux.cfg), 3 (via SeaBIOS)
Trisquel9² 2 (isolinux.cfg), 3 (via SeaBIOS)
Debian9¹ 1 (grub.cfg), 3 (via SeaBIOS)
OpenSUSE¹ 2 (isolinux.cfg), 3 (via SeaBIOS)
Qubes R4.0.3² 3 (via SeaBIOS)
¹ preliminary information, to be tested more thoroughly
² confirmed information
Harddisk/SSD
------------
Zerocat’s Boot Menu offers different paths to boot from **internal
disk** (AHCI):
1. Coreboot-GRUB2 -> AHCI -> Distro’s Grub2 Configuration File
2. Coreboot-GRUB2 -> AHCI -> Distro’s Isolinux Configuration File
3. Coreboot-GRUB2 -> AHCI -> Distro’s Kernel Linux
4. Coreboot-GRUB2 -> SeaBIOS Payload -> Distro’s suggested boot path
See this table of tested installations:
Distro Applicable Boot Path
------ --------------------
GNU Guix System² 1 (grub.cfg, coreboot_grub.cfg°), 4 (via SeaBIOS)
Parabola² 1 (grub.cfg), 3 (Kernel)
Hyperbola² 1 (grub.cfg, coreboot_grub.cfg³), 3 (Kernel), 4 (via SeaBIOS)
Trisquel9¹ 1 (grub.cfg), 3 (Kernel), 4 (via SeaBIOS)
Debian9¹ 1 (grub.cfg), 4 (via SeaBIOS)
OpenSUSE² not yet supported
Qubes R4.0.3² 4 (via SeaBIOS)
See this table of tested installations, using **full disk encryption**.
Encrypted devices are to be unlocked via dedicated menu entry, first:
Distro Applicable Boot Path
------ --------------------
GNU Guix System² 1 (grub.cfg, coreboot_grub.cfg°)
Parabola² 1 (grub.cfg), 3 (Kernel)
Hyperbola² 1 (coreboot_grub.cfg³), 3 (Kernel)
Trisquel9² not applicable (boot partition is not encrypted)
Debian9² not yet tested
OpenSUSE² not yet supported
Qubes R4.0.3² not applicable (boot partition is not encrypted)
¹ preliminary information, to be tested more thoroughly
² confirmed information
³ see `../util/grub-mkconfig-coreboot-hyperbola.sh` to create this file
° see `../util/grub-mkconfig-coreboot-guix.sh` to create this file
Accessories
-----------
Files `../templates/zerocat-system-*.scm` might help you to refine your
*GNU Guix System* to match Zerocat products.
File `../util/grub-mkconfig-coreboot-guix.sh` is provided to get your
*GNU Guix System* booted with messages refined.
File `../util/setup-parabola.sh` is provided to get a fully configured
*Parabola System* installed.
File `../util/grub-mkconfig-coreboot-hyperbola.sh` is provided to get
your fully encrypted *Hyperbola System* booted.
___
(See source file for copyright information.)
T60 VGAROM Extraction
=====================
Some T60 configurations require an extracted proprietary VGA Option
ROM. The ROM is to be extracted from memory, as vendor’s BIOS patches
the VGA Option ROM loaded from chip.
Please compare this information to: [Coreboot VGA Support Page][]
How-to
------
* Start the T60 with vendor’s firmware.
* Run a GNU/Linux Operating System.
* Run `sudo lspci -nnvv` and retrieve PCI IDs (manufacturer and device)
for the VGA compatible controller, for instance:
VGA compatible controller [0300]: RV515/M52 [Mobility Radeon X1300] [1002:7149]
or
VGA compatible controller [0300]: RV515/M54 [Mobility Radeon X1400] [1002:7145]
Do not proceed in case `[1002:7149]` or `[1002:7145]` is not your
listed ID!
* Copy the VGA Option ROM from memory to file:
- Note down `<startaddr>` and `<lastaddr>` of the VGA ROM in
memory:
$ sudo cat \
/proc/iomem | \
grep 'Video ROM'
- Copy the memory area into a file:
$ sudo dd \
if=/dev/mem \
of=pci1002,7149.rom \
bs=1c \
skip=$((0x<startaddr>)) \
count=$((0x<lastaddr>-0x<startaddr>+1))
* Pass that file to `../src/gen-rom-zerocat.sh` by means of switch `--rom-vga`.
* Flash the generated Zerocat ROM.
[Coreboot VGA Support Page]: https://www.coreboot.org/VGA_support#RECOMMENDED:_Extracting_from_your_vendor_bios_image
___
(See source file for copyright information.)
Toolchain
=========
This project comes with a **Set of Bash Scripts** for the **Trisquel
GNU/Linux-libre Operating System**. Experimental support for **GNU
Guix** has been added, but this is *Work in Progress*. The set should
help you to easily generate your custom **Zerocat ROM** for a small but
interesting set of ThinkPad laptops, see `../doc/MAINPAGE.md`.
The toolchain is formed by scripts:
1. `../src/setup-toolbox.sh`
2. `../src/gen-payload-seabios.sh`
3. `../src/gen-payload-grub.sh`
4. `../src/gen-rom-zerocat.sh`
Please also make use of `../util/get-sysinfo.sh`, which is an optional
script. It retrieves useful system information and should be run twice
on your *target* machine: *Before* and *after* your successful flash
procedure.
Note that all scripts might be invoked with option `--help` to display
usage information.
The intended order of script invocation is like:
1. Change into folder `src/`:
$ cd src/
2. Invoke:
$ bash setup-toolbox.sh --check
This will check whether required programs and packages are
available on your system. If any error is reported, please install
the appropriate package.
3. Switch your internet connection on.
4. Invoke:
$ bash setup-toolbox.sh \
--toolbox \
--add-project coreboot seabios grub
This will create a new, unique, empty toolbox folder and will
populate it with sources of required external projects as like
*grub*, *seabios* and *coreboot*. The script also runs apropriate
`git checkout` commands in conjunction with `./configure` or
`make`, where applicable. More projects like *libreboot*,
*bios_extract*, *fcode-utils*, *UEFITool* and *flashrom* might be
specified as well, but they are not yet used by the scripts.
Regarding *grub*, a review of its configuration will be displayed
and your key input is required to continue.
In case of script failure due to network issues, convenient resume
options are lacking by the moment. In such a case, please specify
the toolbox folder in use along with the broken project and try
again. Make sure you will end up with your toolbox folder correctly
populated.
Per default, the following project versions are used:
Set 1:
* `coreboot@4.14`
* `grub@grub-2.06`
* `seabios@rel-1.14.0`
You might override default versions by appending a different
version string, i.e. `coreboot@4.8.1` (not valid for x201) or
`grub@2.02`.
Set 2:
* `libreboot@r20160907`
* `bios_extract@effb120`
* `fcode_utils@v1.0.2`
* `uefitool@0.26.0`
* `flashrom@v1.2`
5. Internet connection is not required any more.
6. Invoke:
$ bash gen-payload-seabios.sh --usage
This will list detailed usage information. In order to build the
SeaBIOS payload for platform i386-coreboot, please pick your use
case, e.g.:
* In case you are heading to flash machines that *do not require*
an external VGA Option ROM, invoke:
$ bash gen-payload-seabios.sh \
--toolbox <path/to/toolbox-folder> \
--gen-payload
* In case you are heading to flash machines that *do require* an
external VGA Option ROM, invoke:
$ bash gen-payload-seabios.sh \
--toolbox <path/to/toolbox-folder> \
--gen-payload \
--config-novgarom
That external ROM must be passed to script
`../src/gen-rom-zerocat.sh` later on.
7. Invoke:
$ bash gen-payload-grub.sh --usage
This will list detailed usage information. Please pick your use
case, e.g.:
- In order to generate the GRUB executable payload file for
platform i386-coreboot, you might invoke:
$ bash gen-payload-grub.sh \
--clean \
--toolbox <path/to/toolbox-folder> \
--payload-dir <path/to/grub-payload-folder> \
--gen-keymaps \
--gen-payload
This will pack the GRUB executable payload file for platform
i386-coreboot, small version. The output’s name is hardcoded to
`grub@${version_grub}_i386-coreboot.elf`.
- In order to generate generic GRUB configuration files, you might
– as a next step – invoke:
$ bash gen-payload-grub.sh \
--mostlyclean \
--toolbox <path/to/toolbox-folder> \
--payload-dir <path/to/grub-payload-folder> \
--gen-config \
--config-nomorse \
--strip-comments
- In case you are heading for T60 machines, use additional options
which remove incompatible menu entries from the GRUB boot menu:
$ bash gen-payload-grub.sh \
--mostlyclean \
--toolbox <path/to/toolbox-folder> \
--payload-dir <path/to/grub-payload-folder> \
--gen-config \
--config-nomorse \
--config-nocoreinfo \
--config-nopoweroff \
--strip-comments
- And finally, you might specify a dedicated Zerocat Background, if
you like to:
$ bash gen-payload-grub.sh \
--payload-dir <path/to/grub-payload-folder> \
--config-background <path/to/PNG-Image>
This option might be used three times more in case you want to
provide images of the flash procedure, for instance.
In case you want to set up GRUB authorization, use option
`--config-authorization <user> <password> <scheme>`.
See `--help` output for details.
In case you are using `grub@2.02`, feel free to omit option
`--config-nomorse` on an x60, t60, x200 and t400 target.
8. Invoke:
$ bash gen-rom-zerocat.sh --usage
This will list detailed usage information of the last script to
use. Please pick your target, e.g.:
- In order to build your ROM for a **ZC-X200**, you might invoke:
$ bash gen-rom-zerocat.sh \
--toolbox <path/to/toolbox-folder> \
--target x200 --chipsize 8mb \
--ifd-lock-regions --ifd-medisable \
--ime none --gbe set_<macaddr> \
--payload-grub-dir <path/to/grub-payload-folder>
This will set up Zerocat’s ROM with region ME deleted. The MAC
Address of the onboard Ethernet Controller will be set to a
custom value. Please specify your device’s hexadecimal number
which is located on a sticker close to the second RAM socket.
However, you might set an arbitrary address as well. The x200 is
known to run fine without CPU microcode updates, hence *no*
option `--microcode`.
- In order to build your ROM for a **ZC-X1CarbonGen1**, you might
invoke:
$ bash gen-rom-zerocat.sh \
--toolbox <path/to/toolbox-folder> \
--target x1_carbon_gen1 \
--rom-factory <path/to/factory.bin> \
--ifd-lock-regions --ifd-altmedisable \
--ime xtrunc \
--microcode \
--payload-grub-dir <path/to/grub-payload-folder>
This will set up Zerocat’s ROM with region ME cleaned and
*exremely shrunk*, and region BIOS *increased*. The X1 seems to
freeze in case CPU microcode updates are not provided, hence
option `--microcode`. However, omit this option in case you
want your machine to boot up in a blobfree manner. You might
try to load updates later on with your operating system.
- In order to build your ROM for a **ZC-X230**, you might invoke:
$ bash gen-rom-zerocat.sh \
--toolbox <path/to/toolbox-folder> \
--target x230 \
--rom-factory <path/to/factory.bin> \
--ifd-lock-regions --ifd-altmedisable \
--ime xtrunc --gbe set_<macaddr> \
--microcode \
--payload-grub-dir <path/to/grub-payload-folder>
This will set up Zerocat’s ROM with region ME cleaned and
*extremely shrunk*, and region BIOS *increased*. The MAC
Address of the onboard Ethernet Controller will be set to a
custom value. Please specify your device’s hexadecimal number
which is located on a sticker close to the second RAM socket.
However, you might set an arbitrary address as well. The X230
seems to freeze in case CPU microcode updates are not provided,
hence option `--microcode`. However, omit this option in case
you want your machine to boot up in a blobfree manner. You
might try to load updates later on with your operating system.
- In order to build your ROM for a **ZC-T430**, you might invoke:
$ bash gen-rom-zerocat.sh \
--toolbox <path/to/toolbox-folder> \
--target t430 \
--rom-factory <path/to/factory.bin> \
--ifd-lock-regions --ifd-altmedisable \
--ime xtrunc --gbe set_<macaddr> \
--microcode \
--payload-grub-dir <path/to/grub-payload-folder>
This will set up Zerocat’s ROM with region ME cleaned and
*extremely shrunk*, and region BIOS *increased*. The MAC
Address of the onboard Ethernet Controller will be set to a
custom value. Please specify your device’s hexadecimal number
which is located on a sticker close to the second RAM socket.
However, you might set an arbitrary address as well. The T430
seems to freeze in case CPU microcode updates are not provided,
hence option `--microcode`. However, omit this option in case
you want your machine to boot up in a blobfree manner. You
might try to load updates later on with your operating system.
- In order to build your ROM for a **ZC-X201**, you might invoke:
$ bash gen-rom-zerocat.sh \
--toolbox <path/to/toolbox-folder> \
--target x201 \
--rom-factory <path/to/factory.bin> \
--ifd-lock-regions \
--ime keep --gbe keep \
--microcode \
--payload-grub-dir <path/to/grub-payload-folder>
This will set up Zerocat’s ROM with region ME untouched. The GbE
Firmware is in use as extracted from the vendor ROM. If you try
to modify the IME or the AltMeDisable bit, the fan is not
controlled and your machine is likely to get overheated. Reboots
fromout the GRUB Bootmenu will get stuck.
- In order to build your ROM for a **ZC-T420**, you might invoke:
$ bash gen-rom-zerocat.sh \
--toolbox <path/to/toolbox-folder> \
--target t420 \
--rom-factory <path/to/factory.bin> \
--ifd-lock-regions --ifd-altmedisable \
--ime trunc --gbe keep \
--payload-grub-dir <path/to/grub-payload-folder>
This will set up Zerocat’s ROM with region ME cleaned and
*shrunk*, and region BIOS *increased*. The GbE Firmware is in
use as extracted from the vendor ROM. The t420 seems to run fine
without CPU microcode updates, hence *no* option `--microcode`.
- In order to build your ROM for a **ZC-T60 with ATI Graphics
(Mobility Radeon X1300)**, you might invoke:
$ bash gen-rom-zerocat.sh \
--toolbox <path/to/toolbox-folder> \
--target t60_ati_mobility_radeon_x1300 \
--rom-vga <path/to/pci1002,7149.rom> \
--payload-grub-dir <path/to/grub-payload-folder>
Note file `pci1002,7149.rom` is an external, proprietary VGA
Option ROM that you should have extracted from memory, before.
See `../doc/t60-vgarom-extraction.md` for details. The t60 seems
to run fine without CPU microcode updates, hence *no* option
`--microcode`.
Upon script start, previously configured GRUB settings will be
detected automatically, and secondary payloads will be compiled as
required. Please take your time to review the reported settings.
Occasionally, the script will require some user interaction. You
should be safe to enter “yes” if asked to do so.
If the script succeeds, a new folder has been created. It contains
a fully configured `zerocat.rom` along with more files, checksums,
backups and subfolders. The ROM can now be flashed to your target
machine’s SPI chip. In case your target has a virtual SPI Chip
formed by two physical ones, the ROM has been split into
`zerocat.rom.bottom` for chip #1 and `zerocat.rom.top` for chip #2.
Note, for targets other than x200, t400, t500, option
`--ifd-altmedisable` is not available with `coreboot@4.8.1`.
Done, now head for flashing!
Good luck!
___
(See source file for copyright information.)
X220/X230 Microphone Hack
=========================
LED-Board with Microphones
--------------------------
Note the X220 and X230 LED-Board not only holds the system status LEDs,
but as well two digital microphones. The LED-Board is connected to the
motherboard via cable, which uses a 16-pin connector on the LED-Board
versus a 30-pin connector at the system board.
LED-Board Connector, 16-Pin
---------------------------
On the X220, the pinout of the 16-Pin LED-Board Connector is estimated
as like:
+------------------------------------------------------+
| +-----------------+-----------------------------+ |
| | | | |
| | | | |
············|·|·················|······ | |
o o o o o o o o o o o o o o o o : Short Edge | |
··|·|·|·|·|·····|·|·|·|·|·|·|·|········ | |
| | | | | | | | | | | | | | |
| | | | | | | | | | | | +---------> Not Connected | |
| | v v v | | | | | | | | |
| | MICBUS | | | | | | | | |
| | | | | | | +-|----------->[LED Standby ]<----+ |
v v | | | | +---|----------->[LED Batt1 ]<----+ |
MIC | | | +-----|----------->[LED Batt2 ]<----+ |
PWR +-|-|-------|----------->[LED WiFi ]<----+ |
| +-------|----------->[LED HDD ]<---------+
+---------|----------->[LED Bluetooth ]----+
| |
+--------------------------------+--- GND
How to Disable the Microphones
------------------------------
![X220: TFT Connector, five contacts covered.][!DSCN7972-annotated.jpg]
In case you want to disable the microphones on the X220, just follow
the routes of the first five wires towards the TFT’s right hand
sysboard connector and cover its first five contacts with a small
adhesive strip. **This seems to apply to the X230 as well.**
[!DSCN7972-annotated.jpg]: ../images/DSCN7972-annotated.jpg "X220: TFT Connector, five contacts covered."
___
(See source file for copyright information.)
Documentation for “Zerocat Coreboot Machines” as of Sun, 31 Oct 2021 10:42:02 +0100
Repository: git://zerocat.org/zerocat/projects/coreboot-machines
Version: v0.16.0-1-6c3e92fa
Branch: master