Documentation for “Zerocat Chipflasher” as of Tue, 03 Dec 2024 13:38:06 +0100
Repository: git://zerocat.org/zerocat/projects/chipflasher
Version: v2.0.2
Branch: flashrom-interface
Propeller Spin/PASM Compiler 'OpenSpin' (c)2012-2016 Parallax Inc. DBA Parallax Semiconductor.
Version 1.00.78
Compiling...
../../firmware2/src/serprog-SPI-PASM-Pulse.spin
|-pins.spin
Done.
Program size is 676 bytes
TYPE: 43 VALUE: 00000000 (00000000) NAME: FUNCID__READY
TYPE: 43 VALUE: 00000001 (00000000) NAME: FUNCID__INIT1
TYPE: 43 VALUE: 00000002 (00000000) NAME: FUNCID__POWERON
TYPE: 43 VALUE: 00000003 (00000000) NAME: FUNCID__POWEROFF
TYPE: 43 VALUE: 00000004 (00000000) NAME: FUNCID__PULSE
TYPE: 53 VALUE: 00000001 (00000004) NAME: GO
TYPE: 53 VALUE: 00000102 (00000004) NAME: INIT
TYPE: 53 VALUE: 00000003 (00000004) NAME: POWER_ON
TYPE: 53 VALUE: 00000004 (00000004) NAME: POWER_OFF
TYPE: 53 VALUE: 00000005 (00000004) NAME: PULSE_ON
TYPE: 53 VALUE: 00000006 (00000004) NAME: PULSE_OFF
TYPE: 4F VALUE: 00000007 (00000000) NAME: PINS
TYPE: 51 VALUE: 00000000 (00000000) NAME: PIN_CEN1^A
TYPE: 51 VALUE: 00000001 (00000000) NAME: PIN_CEN0^A
TYPE: 51 VALUE: 00000002 (00000000) NAME: PIN_MOSI^A
TYPE: 51 VALUE: 00000003 (00000000) NAME: PIN_WPN^A
TYPE: 51 VALUE: 00000004 (00000000) NAME: PIN_SCLK3^A
TYPE: 51 VALUE: 00000005 (00000000) NAME: PIN_SCLK2^A
TYPE: 51 VALUE: 00000006 (00000000) NAME: PIN_SCLK1^A
TYPE: 51 VALUE: 00000007 (00000000) NAME: PIN_SCLK0^A
TYPE: 51 VALUE: 00000008 (00000000) NAME: PIN_MISO^A
TYPE: 51 VALUE: 00000009 (00000000) NAME: PIN_PLUGTESTN^A
TYPE: 51 VALUE: 0000000A (00000000) NAME: PIN_PNP^A
TYPE: 51 VALUE: 0000000C (00000000) NAME: PIN_HOLDN^A
TYPE: 51 VALUE: 0000000D (00000000) NAME: PIN_D3^A
TYPE: 51 VALUE: 0000000E (00000000) NAME: PIN_D2^A
TYPE: 51 VALUE: 0000000F (00000000) NAME: PIN_D1^A
TYPE: 51 VALUE: 0000001D (00000000) NAME: PIN_TRIGGER^A
TYPE: 51 VALUE: 0000001E (00000000) NAME: PIN_TX^A
TYPE: 51 VALUE: 0000001F (00000000) NAME: PIN_RX^A
TYPE: 51 VALUE: 00000010 (00000000) NAME: SWDIP_A^A
TYPE: 51 VALUE: 00000011 (00000000) NAME: SWDIP_B^A
TYPE: 51 VALUE: 00000012 (00000000) NAME: SWDIP_1^A
TYPE: 51 VALUE: 00000013 (00000000) NAME: SWDIP_2^A
TYPE: 51 VALUE: 00000014 (00000000) NAME: SWDIP_3^A
TYPE: 51 VALUE: 00000015 (00000000) NAME: SWDIP_4^A
TYPE: 51 VALUE: 00000016 (00000000) NAME: SWDIP_5^A
TYPE: 51 VALUE: 00000017 (00000000) NAME: SWDIP_6^A
TYPE: 51 VALUE: 00000010 (00000000) NAME: RST_DISABLE^A
TYPE: 51 VALUE: 00000018 (00000000) NAME: RS232_RST^A
TYPE: 51 VALUE: 0000000B (00000000) NAME: RST_INHIBIT^A
TYPE: 51 VALUE: 0000001B (00000000) NAME: ADC_OUT^A
TYPE: 51 VALUE: 0000001A (00000000) NAME: ADC_CALIBRATION^A
TYPE: 51 VALUE: 00000019 (00000000) NAME: ADC_IN^A
TYPE: 51 VALUE: 00000003 (00000000) NAME: MASK_CEN_AVAIL^A
TYPE: 51 VALUE: 000000F0 (00000000) NAME: MASK_SCLK_AVAIL^A
TYPE: 51 VALUE: 000011FF (00000000) NAME: MASK_SPI_BUS_AVAIL^A
TYPE: 51 VALUE: 000000F0 (00000000) NAME: MASK_SCLK_ACTIVE100^A
TYPE: 51 VALUE: 000000E0 (00000000) NAME: MASK_SCLK_ACTIVE75^A
TYPE: 51 VALUE: 000000C0 (00000000) NAME: MASK_SCLK_ACTIVE50^A
TYPE: 51 VALUE: 00000080 (00000000) NAME: MASK_SCLK_ACTIVE25^A
TYPE: 51 VALUE: 00000000 (00000000) NAME: MASK_SCLK_ACTIVE0^A
TYPE: 51 VALUE: 000000F0 (00000000) NAME: MASK_SCLK_ACTIVE^A
TYPE: 50 VALUE: 00000001 (00000000) NAME: CHECK_CABLE^A
TYPE: 50 VALUE: 00000002 (00000000) NAME: GET_BOARD_CONFIG^A
TYPE: 50 VALUE: 00000103 (00000000) NAME: GET_BOARD_VERSION^A
TYPE: 50 VALUE: 00000104 (00000000) NAME: GET_PIN_RSTINHIBIT^A
TYPE: 50 VALUE: 00000105 (00000000) NAME: GET_MONITOR_HARDWARE^A
TYPE: 50 VALUE: 00000106 (00000000) NAME: GET_POWERUP_TYPE^A
TYPE: 50 VALUE: 00000107 (00000000) NAME: GET_SUSPEND_INHIBIT^A
TYPE: 50 VALUE: 00000108 (00000000) NAME: GET_MODE_SPI^A
TYPE: 50 VALUE: 00000109 (00000000) NAME: GET_DRIVER_STRENGTH^A
TYPE: 50 VALUE: 0000010A (00000000) NAME: GET_BAUDRATE^A
TYPE: 50 VALUE: 0000010B (00000000) NAME: HIGH^A
TYPE: 50 VALUE: 0000010C (00000000) NAME: LOW^A
TYPE: 43 VALUE: 00000009 (00000000) NAME: PIN_TRISTATE
TYPE: 43 VALUE: 0000001D (00000000) NAME: PIN_TRG_FSEL
TYPE: 47 VALUE: 00000000 (00000000) NAME: STACK
TYPE: 4A VALUE: 00000020 (00000000) NAME: SPI_PULSE
TYPE: 4A VALUE: 00000024 (00000004) NAME: LOOP0^B^A^A^A
TYPE: 4A VALUE: 00000050 (00000030) NAME: INIT1
TYPE: 4A VALUE: 00000090 (00000070) NAME: INIT1_RET
TYPE: 4A VALUE: 00000094 (00000074) NAME: POWERON
TYPE: 4A VALUE: 0000009C (0000007c) NAME: POWERON_RET
TYPE: 4A VALUE: 000000A0 (00000080) NAME: POWEROFF
TYPE: 4A VALUE: 000000A8 (00000088) NAME: POWEROFF_RET
TYPE: 4A VALUE: 000000AC (0000008c) NAME: PULSE
TYPE: 4A VALUE: 000000BC (0000009c) NAME: PULSE_40M ^A^A^A
TYPE: 4A VALUE: 000000D4 (000000b4) NAME: PULSE_10M ^A^A^A
TYPE: 4A VALUE: 00000118 (000000f8) NAME: PULSE_RET
TYPE: 4A VALUE: 0000011C (000000fc) NAME: MASK_TRIGGER
TYPE: 4A VALUE: 00000120 (00000100) NAME: READY
TYPE: 4A VALUE: 00000124 (00000104) NAME: V_FRQA
TYPE: 4A VALUE: 00000128 (00000108) NAME: V_FRQB
TYPE: 4B VALUE: 0000012C (0000010c) NAME: FUNCID
TYPE: 4B VALUE: 0000012C (00000110) NAME: P_STACK
TYPE: 4B VALUE: 0000012C (00000114) NAME: P
TYPE: 4B VALUE: 0000012C (00000118) NAME: PINSCLK
TYPE: 4B VALUE: 0000012C (0000011c) NAME: MASK_PINSCLK
TYPE: 4E VALUE: 00000004 (00000000) NAME: PIN_SCLK
Distilled longs: 0
OBJ bytes: 840
_CLKMODE: 00
_CLKFREQ: 00B71B00
0000- 08 00 94 02 74 01 07 01 2C 01 00 00 36 01 00 00 ....t...,...6...
0010- 48 01 00 00 57 01 00 00 66 01 00 00 6C 01 00 00 H...W...f...l...
0020- 74 01 08 00 F0 89 BC A0 44 86 BC 08 01 86 7C EC t.......D.....|.
0030- 04 86 7C 86 23 7C E8 5C 02 86 7C 86 1D 3E E8 5C ..|.#|.\..|..>.\
0040- 03 86 7C 86 20 44 E8 5C 01 86 7C 86 0C 38 E8 5C ..|. D.\..|..8.\
0050- 01 00 7C 5C 44 8A BC A0 04 8A FC 80 45 8C BC 08 ..|\D.......E...
0060- 01 8E FC A0 46 8E BC 2C 47 EC BF 64 47 E8 BF 64 ....F..,G..dG..d
0070- 00 F0 FF 58 46 F0 BF 50 09 F0 FF 54 41 F4 BF A0 ...XF..P...TA...
0080- 00 F2 FF 58 46 F2 BF 50 09 F2 FF 54 42 F6 BF A0 ...XF..P...TB...
0090- 44 80 3C 08 00 00 7C 5C 47 EC BF 68 44 80 3C 08 D.<...|\G..hD.<.
00A0- 00 00 7C 5C 47 EC BF 64 44 80 3C 08 00 00 7C 5C ..|\G..dD.<...|\
00B0- 3F 7E 3C F4 3F 7E 3C F0 F2 7F 3C 62 2D 00 68 5C ?~<.?~<...<b-.h\
00C0- 20 F2 FF 58 00 00 00 00 00 00 00 00 00 00 00 00 ..X............
00D0- 00 F2 FF 58 3E 00 7C 5C 20 F0 FF 58 00 00 00 00 ...X>.|\ ..X....
00E0- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00F0- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0100- 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
0110- 00 00 00 00 00 00 00 00 00 F0 FF 58 00 00 7C 5C ...........X..|\
0120- 00 00 00 20 00 00 00 00 00 00 00 20 00 00 00 80 ... ....... ....
0130- 35 43 35 D1 34 C7 20 43 2C 32 64 43 36 D1 36 43 5C5.4. C,2dC6.6C
0140- 35 D1 43 35 D0 35 FC 0B 02 04 77 32 37 00 43 35 5.C5.5....w27.C5
0150- D1 43 35 D0 35 FC 0B 02 04 77 32 37 21 43 35 D1 .C5.5....w27!C5.
0160- 43 35 D0 35 FC 0B 02 04 77 32 37 01 43 35 D1 32 C5.5....w27.C5.2
0170- 35 43 35 D1 32 00 00 00 20 01 0D 00 34 00 00 00 5C5.2... ...4...
0180- 3E 00 00 00 59 00 00 00 61 00 00 00 73 00 00 00 >...Y...a...s...
0190- 83 00 00 00 98 00 00 00 AD 00 00 00 C9 00 00 00 ................
01A0- DF 00 00 00 0D 01 00 00 16 01 00 00 38 09 3D 92 ............8.=.
01B0- 35 FB 61 62 47 32 38 17 38 12 3E 92 E7 37 25 E8 5.abG28.8.>..7%.
01C0- 61 37 00 62 43 38 11 37 03 3E 92 37 21 E8 62 4A a7.bC8.7.>.7!.bJ
01D0- 32 64 37 21 E8 36 EC 33 32 38 72 00 64 05 03 36 2d7!.6.328r.d..6
01E0- 0D 04 38 0B 33 0C 37 03 33 0C 32 38 82 00 64 05 ..8.3.7.3.28..d.
01F0- 03 36 0D 03 34 33 0C 35 33 0C 32 38 97 00 64 05 .6..43.53.28..d.
0200- 03 36 0D 08 64 37 06 E8 35 FB 33 0C 34 33 0C 32 .6..d7..5.3.43.2
0210- 38 AC 00 64 05 03 36 0D 08 64 37 05 E8 35 FB 33 8..d..6..d7..5.3
0220- 0C 35 33 0C 32 38 C8 00 64 05 03 36 0D 0E 64 37 .53.28..d..6..d7
0230- 03 E8 0A 04 35 33 04 03 37 21 33 0C 37 21 33 0C ....53..7!3.7!3.
0240- 32 38 DE 00 64 05 03 36 0D 09 64 38 0C E8 37 00 28..d..6..d8..7.
0250- E2 33 0C 36 33 0C 32 39 01 0C 00 64 05 03 36 0D .3.63.29...d..6.
0260- 1D 39 01 05 64 37 04 E8 38 05 E2 35 0D 04 36 0D .9..d7..8..5..6.
0270- 07 0C 3A 01 C2 00 33 0C 39 E1 00 33 0C 0C 3A 01 ..:...3.9..3..:.
0280- C2 00 33 0C 32 64 3D D4 1C 64 3D D6 1C 32 64 3D ..3.2d=..d=..2d=
0290- D4 18 64 3D D6 1C 32 00 8E 46 55 4E 43 49 44 5F ..d=..2..FUNCID_
02A0- 5F 52 45 41 44 59 10 00 00 00 00 46 55 4E 43 49 _READY.....FUNCI
02B0- 44 5F 5F 49 4E 49 54 31 10 01 00 00 00 46 55 4E D__INIT1.....FUN
02C0- 43 49 44 5F 5F 50 4F 57 45 52 4F 4E 10 02 00 00 CID__POWERON....
02D0- 00 46 55 4E 43 49 44 5F 5F 50 4F 57 45 52 4F 46 .FUNCID__POWEROF
02E0- 46 10 03 00 00 00 46 55 4E 43 49 44 5F 5F 50 55 F.....FUNCID__PU
02F0- 4C 53 45 10 04 00 00 00 47 4F 00 49 4E 49 54 01 LSE.....GO.INIT.
0300- 50 4F 57 45 52 5F 4F 4E 00 50 4F 57 45 52 5F 4F POWER_ON.POWER_O
0310- 46 46 00 50 55 4C 53 45 5F 4F 4E 00 50 55 4C 53 FF.PULSE_ON.PULS
0320- 45 5F 4F 46 46 00 50 49 4E 5F 54 52 49 53 54 41 E_OFF.PIN_TRISTA
0330- 54 45 10 09 00 00 00 50 49 4E 5F 54 52 47 5F 46 TE.....PIN_TRG_F
0340- 53 45 4C 10 1D 00 00 00 SEL.....
______________________________________________________________________________
********************************************************* File starts here ***
Zerocat Chipflasher --- Flash free firmware, kick the Management Engine.
Copyright (C) 2020, 2021, 2022 Kai Mertens
File serprog-SPI-PASM-Pulse.spin --- Emit SPI clock pulse train,
triggered by pin transition
This file is part of Zerocat Chipflasher.
See end of file for terms of use.
******************************************************************************
# Object Summary
Object "../../firmware2/src/serprog-SPI-PASM-Pulse" Interface:
PUB go
PUB init(pin_SCLK)
PUB power_on
PUB power_off
PUB pulse_on
PUB pulse_off
Program: 165 Longs
Variable: 2 Longs
# Objects
Load pin configuration object.
# Constants
Pin Configuration
PIN_TRISTATE --- Idle Counter Pin
PIN_TRG_FSEL --- Trigger and Frequency Select
ENUM t_FUNCID
FUNCID__READY, must be zero
FUNCID__init1
FUNCID__poweron
FUNCID__poweroff
FUNCID__pulse
# Variables
stack[] --- Provide some stack space
# Functions
_______
PUB go
Launch PASM code into new cog: SPI_Pulse
___________________
PUB init(pin_SCLK)
Launch PASM routine: init1
_____________
PUB power_on
Launch PASM routine: poweron
______________
PUB power_off
Launch PASM routine: poweroff
_____________
PUB pulse_on
Launch PASM routine: pulse
The routine will keep monitoring the trigger pin in an endless loop.
Use `pulse_off` and a trigger pulse to quit.
______________
PUB pulse_off
Clear function ID with ready flag.
A trigger pulse is required to quit the `pulse` routine.
# PASM/Data
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
SPI_Pulse --- PASM code entry
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
init1 --- get parameter, initialize clock pin, set counter mode
Description:
Stores clock pin and corresponding bitmask at runtime.
Parameter:
* stack[1] = SPI clock pin number
* stack[0] = function ID / Ready Flag
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
poweron --- enable clock pin
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
poweroff --- disable clock pin
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
pulse --- Emit Pulse Train, 10MHz or 40MHz
Description:
Once started, routine keeps monitoring the trigger pin. If a low-to-high edge
has been detected, a train of 8 clock pulses is provided on the clock pin. To
quit the endless loop, set the ready flag from outside and provide one final
trigger. The routine will end by issuing a dummy train at high speed.
Parameter:
None, but trigger pin is monitored for frequency select right after trigger.
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
Named registers, initialized
mask_TRIGGER --- bitmask for trigger and frequency select pin
ready --- used to flag valid data or end of function
v_frqa --- 10MHz NCO
v_frqb --- 40MHz NCO
''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
Named registers, reserved space, not initialized
funcID --- PASM function to call
p_stack --- stack base address, as passed via PAR
p --- pointer into stack
pinSCLK --- clock pin
mask_pinSCLK --- clock pin bitmask
******************************************************************************
Terms of Use:
Zerocat Chipflasher is free software: you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation, either version 3 of the
License, or (at your option) any later version.
Zerocat Chipflasher is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
General Public License for more details.
You should have received a copy of the GNU General Public License along
with Zerocat Chipflasher. If not, see <http://www.gnu.org/licenses/>.
************************************************************** End of File ***