Documentation for “Zerocat Chipflasher”
Generated on: Tue, 03 Jun 2025 18:36:22 +0200
Repository: git://zerocat.org/zerocat/projects/chipflasher
Board: board-v2.0.0-1244-4270742b1
Version: v2.0.2-0-4270742b1
Branch: flashrom-interface
Chipflasher “v2”, Successor of Chipflasher “board-edition-1”
Copyright (C) 2016 kai kmx@posteo.net
Copyright (C) 2016 rekado rekado@elephly.net
Copyright (C) 2016, 2017, 2018, 2019, 2020, 2021, 2022, 2023 Kai Mertens kmx@posteo.net
Copyright (C) 2017 tomás zerolo tomas@tuxteam.de
Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled "GNU Free Documentation License".
The initial project was started by Kai Mertens in 2015, as a private
project.
It was renamed and continued in 2016, but still kept private.
Authors of the initial code and documentation are:
The project was split and again renamed to the current version in 2016, and turned public. See tag repo-root-info for details.
Authors of Zerocat Chipflasher are now listed according to git log
output.
See copyright notices on the title page.
Since project version v2.0.0, changes are tracked within this file,
#../doc/CHANGES.md.
For changes, introduced by version v2.0.0 and lower, see
#../doc/version-history.md.
Changes introduced to hardware design files are tracked in file
#../hardware/CHANGES.md.
For changes, introduced by version board-v2.0.0 and lower, see
#../doc/board-version-history.md.
NOTICE: Anyone modifying the project should provide brief information about the modifications, including the date they were made. Information should be added but never removed from this file. Licensees should provide a brief entry with a date and the nature of the modification for each change. Please use markdown syntax!
2023/03/15: Project version v2.0.2 released!
This version ships improved make files according to:
Zerocat Project Template v0.0.23
The project’s environment setup is now made easy.
Code snippets, suitable to build the documentation in one go, are available via README file.
The generated HTML documentation is refined and enriches the main documentation by subordinate documentations for firmware and kit.
The navigation should be easier to understand. Distracting buttons have been dropped, obsolete files have been removed.
Information about the project’s shell environment is provided in detail by a dedicated button, called “GNU Guix Environment”.
2023/02/15: Project version v2.0.1 released!
The default goal in file ../host/start/Makefile is fixed as part
of an over-all goal and recipe review. So called ‘ready-made’ targets
are now available for all combinations of firmware, board version,
utility, RS232 baudrate and upload destination (e.g. RAM or EEPROM).
The main documentation ships a related quick start section, which should get you started along firmware configuration tables.
Some documents are updated with adapted invocation snippets of
make or have been cleaned to provide less content but improved
focus.
The device name, reported to flashrom, changes from
‘Zerocat! -v2-’ to ‘Chipflasher v2’ and from
‘Zerocat! -v1-’ to ‘Chipflasher v1’.
Quotation in file ../doc/THANKS.md is refined and ships URL
shortcuts.
Kit User Guide, update URL to partner store’s kit sales page.
2023/02/03: Project version v2.0.0 released!
Documentation source files are written in markdown syntax. They should carry their individual copyright and license notices right below the title giving headline, e.g.:
<Title-of-Document>
===================
Copyright (C) <Year> <Name-of-Author> <Email-Address>
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.3
or any later version published by the Free Software Foundation;
with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
Texts. A copy of the license is included in the section entitled
"GNU Free Documentation License".
<Other-Headline>
----------------
...content...
The generated documentation carries a license notice right at top on
its title page, with copyright statements generated from git log
output.
Sections of the generated documentation are build from selected markdown source files, with their individual copyright and license notice stripped.
In order to enrich the generated documentation ...
*.md markdown source files to ../doc/.... and adapt ../doc/Makefile to produce nice output.
In case more tools are needed, don't forget to update ../guix/manifest0.scm.
To make your image look nice within the documentation, select a landscape layout of 16:9 aspect ratio.
Use ImageMagick to prepare your image, e.g.:
If your image is big, reduce it to a maximal width of 2000 pixel:
mogrify -resize 2000x <image>
Please clean image files from metadata, before committing, i.e.:
mogrify -strip <image>
If you embed your image into a markdown documentation file, use this syntax:
![<path/to/image>][]
[<path/to/image>]: <path/to/image> "title message"
or alternatly:
![<path/to/image>][my-image-shortcut]
[my-image-shortcut]: <path/to/image> "title message"
These patterns will guarantee that <img> tags will have their src,
alt and title attributes properly set within the html output.
Please use this license header for code source files:
Zerocat Chipflasher --- Flash free firmware, kick the Management Engine.
Copyright (C) <Year> <Name-of-Author> <Email-Address>
This file is part of Zerocat Chipflasher.
Zerocat Chipflasher is free software: you can redistribute it
and/or modify it under the terms of the GNU General Public
License as published by the Free Software Foundation, either
version 3 of the License, or (at your option) any later
version.
Zerocat Chipflasher is distributed in the hope that it will be
useful, but WITHOUT ANY WARRANTY; without even the implied
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Zerocat Chipflasher.
If not, see <http://www.gnu.org/licenses/>.
If you intend to write shell scripts, use this skeleton to make them work for GNU Guix:
#!/bin/sh
# Re-exec if we are not using Bash or are using Bash in POSIX mode.
if [ -z "$BASH" ] || [ "$BASH" = "/bin/sh" ]; then
bash=`command -v bash`
if [ -z "$bash" ]; then
echo "Couldn't find Bash, sorry!"
exit 1
else
exec "$bash" "$0" "$@"
fi
fi
# We're using Bash now.
set -o errexit
set -o nounset
set -o pipefail
# Your code goes here ...
Update ../doc/CHANGES.md and list your contributions.
You can use git shortlog to get a starting point for your edit.
Zerocat Chipflasher ships copyrighted work.
See #../doc/AUTHORS.md for a list of people that have contributed.
Zerocat Chipflasher is free software. It makes use of free software licenses as recognized by Free Software Foundation (FSF), and should be freely distributable:
Files located in folder hardware/, if available, describe hardware
of a free design, licensed under:
Authorship, copyright and license information may be provided in more detail on a per-folder and/or per-file basis. Check the sources.
Please report a bug if you find the distribution hindered.
See Zerocat Website for contact information.
Version 1.3, 3 November 2008
Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc. http://fsf.org/
Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed.
The purpose of this License is to make a manual, textbook, or other functional and useful document "free" in the sense of freedom: to assure everyone the effective freedom to copy and redistribute it, with or without modifying it, either commercially or noncommercially. Secondarily, this License preserves for the author and publisher a way to get credit for their work, while not being considered responsible for modifications made by others.
This License is a kind of "copyleft", which means that derivative works of the document must themselves be free in the same sense. It complements the GNU General Public License, which is a copyleft license designed for free software.
We have designed this License in order to use it for manuals for free software, because free software needs free documentation: a free program should come with manuals providing the same freedoms that the software does. But this License is not limited to software manuals; it can be used for any textual work, regardless of subject matter or whether it is published as a printed book. We recommend this License principally for works whose purpose is instruction or reference.
This License applies to any manual or other work, in any medium, that contains a notice placed by the copyright holder saying it can be distributed under the terms of this License. Such a notice grants a world-wide, royalty-free license, unlimited in duration, to use that work under the conditions stated herein. The "Document", below, refers to any such manual or work. Any member of the public is a licensee, and is addressed as "you". You accept the license if you copy, modify or distribute the work in a way requiring permission under copyright law.
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If you develop a new program, and you want it to be of the greatest possible use to the public, the best way to achieve this is to make it free software which everyone can redistribute and change under these terms.
To do so, attach the following notices to the program. It is safest to attach them to the start of each source file to most effectively state the exclusion of warranty; and each file should have at least the "copyright" line and a pointer to where the full notice is found.
<one line to give the program's name and a brief idea of what it does.>
Copyright (C) <year> <name of author>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
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Also add information on how to contact you by electronic and paper mail.
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<program> Copyright (C) <year> <name of author>
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
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The goal of Zerocat Chipflasher is to provide an electronic device for the purpose of firmware replacement, fully hackable and of a free design, even down to chip level.
When it comes to flash a Coreboot or Libreboot compatible machine, the Zerocat Chipflasher is the right tool to use:
... and it uses the Parallax P8X32A free-design microcontroller!
The chipflasher not only accesses the main memory array of SPI chips, it also gives you full control over the chips’ configuration registers:
Set register values using `kick'/`connect', the first firmware.
In case of chips made by Macronix, it even provides access to the lock bits of the security register, as well as to the secured, one-time-programmable region of these chips (typically 64 bytes in size):
Write and read SOTP Region using `kick'/`connect'.
Clean up and lock the region, before someone else will do it!
Clean-up Examples:
It is assumed that you are running a GNU/Linux-libre operating system. We recommend to run GNU Guix System – alternatively, install the GNU Guix package manager.
Your computer has an RS232 port available and your user account is priviledged to access the port, e.g: It is member of the dialout group.
Furthermore, your system should have one or two USB ports available in order to power the flasher device. Otherwise, you will have to use an external power adapter, providing 5 to 6VDC at 1 Ampère.
Use Git to clone the project’s sources:
$ git clone git://zerocat.org/zerocat/projects/chipflasher
Change into the project’s documentation folder:
$ cd chipflasher/doc/
Study this README.md to get started:
$ cat ../doc/README.md
All paths within the documentation are relative to the location of the
documentation source files, which are located in this project’s doc/
folder.
Use GNU Make to create dedicated profiles, and up-to-date profile generations. This allows you to match your environments to the ones used by Zerocat, thus yielding for bit-identical results:
$ make -C ../hardware/guix pull
$ make -C ../guix pull
To remove this project’s handy guix profiles, type:
$ make -C ../hardware/guix clean
$ make -C ../guix clean
This will remove symlinks only. If you want to remove the profiles from your system, run the GNU Guix Garbage Collector.
To list all available targets, type:
$ make -C ../hardware/guix help
$ make -C ../guix help
To generate hardware design files for the documentation, type:
$ echo "make -C ../../hardware" | make -C ../hardware/guix environment
To remove them, type:
$ echo "make -C ../../hardware clean" | make -C ../hardware/guix environment
To build the documentation, type:
$ echo "make -C ../doc" | make -C ../guix environment
To clean up, type:
$ echo "make -C ../doc clean" | make -C ../guix environment
To build the documentation in one go, type:
$ echo "make -C ../../hardware" | make -C ../hardware/guix environment\
&& echo "make -C ../doc" | make -C ../guix environment
To clean up in one go, type:
$ echo "make -C ../../hardware clean" | make -C ../hardware/guix environment\
&& echo "make -C ../doc clean" | make -C ../guix environment
Checkout the profile generation, instantiate channels, create a pure shell that provides nothing but prerequisites:
$ make -C ../guix environment
To confirm that your project environment is properly set up, run:
[env]$ make -C ../guix usage
Invocations of make to generate the documentation, compile the
sources, etc., should be done from this project environment, only.
To restore the initial environment, later on, when you are done with this project, type:
[env]$ exit
The Parallax P8X32A free-design microcontroller is well documented,
let’s take a bunch of documents as a common starting point. See
../doc/Makefile for targets P1 and clean-P1. P1 can be used
to get files downloaded, e.g.:
$ echo "cd ../doc && make P1 && cd -" | make -C ../guix environment
These RS232 data cables have been used during development. Their pinouts are provided here in the hope they will be useful.
Number 1) and 2) seem to be the best, for they have proper grounding of GND and Protective GND. Usual length of each cable is about 100cm.
DTE = Data Terminal Equipment (Host)
This side is using a DB9 plug.
DCE = Data Communication Equipment (Chipflasher Board)
This side is using a Header9_1 Connector.
All pin names reflect their function from the host’s point of view (DTE pin labels). See chipflasher-page11.sch or chipflasher-page11.sch.png for more details.
DTE Function | DTE pin label | DTE pin | DCE pin | Zerocat Connect Usage (Host)
------------ | ------------- | ------- | ------- | ----------------------------
Carrier Detect | CD | 1 | 1 | not used
Data Set Ready | DSR | 6 | 2 | not used
Receive Data | RXD | 2 | 3 | receive data
Request To Send | RTS | 7 | 4 | alternative reset line
Transmit Data | TXD | 3 | 5 | transmit data
Clear To Send | CTS | 8 | 6 | not used
Data Terminal Ready | DTR | 4 | 7 | default reset line
Ring Indicator | RI | 9 | 8 | not used
Ground | GND | 5 | 9 | gnd, power return
DTE pin label | DTE pin | colour | DCE pin
------------- | ------- | ------ | -------
CD | 1 | brown | 1
DSR | 6 | grey | 2
RXD | 2 | blue | 3
RTS | 7 | green | 4
TXD | 3 | red | 5
CTS | 8 | yellow | 6
DTR | 4 | violet | 7
RI | 9 | orange | 8
GND | 5 | black | 9
PGND | 5 | shield |
DTE pin label | DTE pin | colour | DCE pin
------------- | ------- | ------ | -------
RXD | 2 | white | 3
TXD | 3 | red | 5
DTR | 4 | green | 7
GND | 5 | yellow | 9
PGND | 5 | shield |
DTE pin label | DTE pin | colour | DCE pin
------------- | ------- | ------ | -------
RXD | 2 | brown | 3
RTS | 7 | white | 4
TXD | 3 | orange | 5
DTR | 4 | green | 7
GND | 5 | blue | 9
DTE pin label | DTE pin | colour | DCE pin
------------- | ------- | ------ | -------
DSR | 6 | white | 2
RXD | 2 | black | 3
RTS | 7 | yellow | 4
TXD | 3 | brown | 5
DTR | 4 | red | 7
GND | 5 | orange | 9
Development of Zerocat’s “Chipflasher v2” has been made possible by financial means of the NGI0 PET Fund, a fund dedicated to Privacy and Trust Enhancing technologies, financially supported by the European Commission’s Next Generation Internet programme. Furthermore, I received great support from Michiel Leenaars and the NLnet Foundation, as well as from OSE-Germany e.V. and associated fellows.
Dear guys, I am very grateful to have met your friendly companionship and encouragement, thank you! --- Kai Mertens
This history gives you a version overview of the chipflasher hardware
in contrast to its firmware or host utility software. The chipflasher
hardware is represented by files under the ../hardware folder, most
prominently to mention the ../hardware/gschem/chipflasher-page??.sch
circuit schematic files. To see the history of firmware, software and
documentation, please check #../doc/version-history.md instead.
board-v<major>.<minor>.<revision>[-<number-of-new-commits>-<commit-hash>]
NOTE: Tags are using the first three numbers only, i.e. board-v0.1.0.
NOTE: There may be exceptions, which do not follow the Board Version Scheme.
board-v
This prefix indicates a version tag which is related to the hardware.
<major>
Hardware has changed. The resulting product is a major change or upgrade. You will need to upgrade your firmware and/or equipment and/or PCB due to incompatibilities with the previous version.
<minor>
Onboard hardware has changed. Additional functionality or new features are introduced. You are allowed to re-use the PCB, though.
<revision>
No changes of hardware. Bug fixes, minor changes, graphical stuff.
-<number-of-new-commits>-<commit-hash>
Commit description as retrieved with git describe, but git
specific ‘g’ marker stripped off.
Chipflasher board v2 design sources released!
Circuit schematics and PCB design files are now publically available.
Hardware Design Sources are licensed under CERN Open Hardware License Version 2 – Strongly Reciprocal or any later version.
You may redistribute and modify the sources and make products using it under the terms of the CERN-OHL-S v2 (https://ohwr.org/cern_ohl_s_v2.txt) or any later version.
This ensures that the source location of the Chipflasher, being engraved into the copper of the PCB, remains with the physical product and its derivatives ;-)
Circuit schematics of testboard v2 have been transferred and adapted.
See ../firmware2/doc/NEWS.md for a list of new features.
Until physical PCBs are available, the new PCB design comes with: Hardware UNTESTED!
Changes will now be tracked with ../hardware/CHANGES.md.
Chipflasher testboard circuit schematics advance towards testboard-v2!
The testboard circuit schematics have been advanced towards a
board v2 prototype. New features are introduced, these are
supported by kick2/flashrom. See ../firmware2/doc/NEWS.md.
Some gschem symbols have been copied and fixed in order to support the
reviewed testboard schematics. They are located in
../hardware/gschem/symbols.
In respect to chipflasher board schematics, the testboard schematics use some pins of the controller in a different way.
The source code distinguishes both board versions as board v1
(chipflasher board) and board v2 (chipflasher testboard). As default,
firmware kick uses board v1, whereas kick2 uses board v2.
Makefiles in ../firmware/src/ and ../firmware2/src offer
appropriate configuration targets.
Improved Makefile in ../hardware/ now deals with local gschem symbols.
Target clean-backups takes *.sym~ files into account.
File ../hardware/gafrc points to local symbol folder and makes it
available as Chipflasher symbols to gschem, when invoked fromout
../hardware/.
../hardware/Makefile removes gschem autosave and backup
files with target clean-backups.The PCB of this version still is fully compatible with board-v1.1.0 and board-edition-1. Set jumper across J4:2 and J4:3.
Add handy synchronization target to: ../hardware/Makefile
Synchronize PCB file with schematic: ../hardware/pcb/board.pcb
Rotate non-polar capacitors C6 and C7 in:
../hardware/gschem/board.sch
Add more descriptions, refine comments to ensure nice output:
../hardware/gschem/board.sch
Process schematics’ description attributes to BoM Files.
Connect MAX3232’s pin 10 to GND:
../hardware/gschem/board.sch, ../hardware/pcb/board.pcb
Set C1 capacitor value to same as noted in schematic:
../hardware/pcb/board.pcb
Stamp generated files with current version, using different name
space for pcb and cover label: ../hardware/Makefile
Remove obsolete scheme script. Instead, use gaf export and
ImageMagick’s convert for image generation:
../hardware/Makefile
Fix fuse value: board.pcb
Remove polarity from capacitor footprints around MAX3232, set correct
values: ../hardware/pcb/board.pcb
Strip white space from comments and text elements, otherwise gschem’s
output is screwed up: ../hardware/gschem/board.sch
Remove obsolete layout attribute: ../hardware/pcb/board.pcb
Update source files to new file versions:
../hardware/gschem/board.sch, ../hardware/pcb/board.pcb
We continue to use the unmodified PCB of tag board-v1.1.0.
New file ../hardware/Makefile
This file replaces its origin (../hardware/doc/makefile) and now
comes with a set of rules that deal with hardware source files by
means of utilities like gschem, gnetlist, pcb, inkscape
and gerbv. Initial settings are clearly set up, now, and SHELL
is set to /bin/sh.
The default goal all covers all targets, except gerbv:
$ make
With $ make gerbv instead, layers of the pcb source file will
be exported and the gerbv utility is started with these layers
already loaded. Checks are to be performed within the GUI, as CLI
flags are missing.
Goal label creates labels with the device’s correct hardware
source file version noted, i.e. board-v1.2.2. These labels come
as PDF and PNG files. (The resulting PCB still is that of
board-v1.1.0, as its pcb source file has not been touched. This
unfortunate version numbering scheme with board- as a prefix is
likely to be mistaken as a pcb-version. It should be changed into
something like hardware-v1.2.2 or device-v1.2.2, probably.
Terms hardware and device are welcome to cover all aspects of
the hardware, not just that of a board or pcb.)
Further goals are: auxiliaries, images, markdown,
gerber and check
Goal clean gives you a clean environment. It is used rather
than cleanall. Where applicable, goal mostlyclean gives
you an option to keep some output.
Manually created files (PNG, PDF) in ../hardware/artwork/ have been
removed. They are now generated via ../hardware/Makefile.
We continue to use the unmodified PCB of tag board-v1.1.0.
Changes in file ../hardware/doc/makefile :
This file has been renamed using lower case letters. This avoids ambiguities within the generated documentation.
Rules have been reviewed, dependencies in respect to
../hardware/gschem/attribs have been added.
Clean rules do not use rm -f, but errors are ignored.
The file now carries a documentation header with copyright and license notes.
Same as board-edition-1, but we resume the Board Version Scheme as described above. This helps us to avoid ambiguities from now on as the version board-edition-1 is RYF-Certified and must not be linked to any changed content. Note the front panel sticker has been updated accordingly.
We continue to use the unmodified PCB of tag board-v1.1.0.
General info:
We continue to use the unmodified PCB of tag board-v1.1.0.
This board version works best in conjunction with software v0.4.3, please compare to #../doc/version-history.md.
The file ../hardware/doc/Makefile has been improved:
.PHONY has been updatedUpgraded comments in ../hardware/gschem/board.sch:
Add a comment about upgraded Polyfuse in file
../hardware/gschem/board.sch.
An unused pin of the RS232 driver should be tied to GND. The documentation now suggests a manual bug fix.
Add a comment about missing pcb heatsink copper area.
Device upgrades as drop-in replacements in ../hardware/gschem/board.sch
allow us to access the sysboard of a ThinkPad T60 while access to a
ThinkPad X60/X60s sysboard now works more reliable as well:
We merge in all improvements of the branch go-for-board-edition-1 while not using the tag board-edition-1 within the git repository itself, yet. This gives us room to fix and complete the documentation until that tag is finally placed. Note chipflasher devices shown on photos are already labelled with a board-edition-1 sticker, however.
We add the file front-panel.dxf to the list of source files.
We continue to use the pcb of version board-v1.1.0.
We continue to use the software version v0.3.0.
The file ../hardware/pcb/board.pcb has been reverted to version
board-v1.1.0 which allows us to use already manufactured PCBs in
conjunction with updated files and front-label version tags.
We used to use a MAX232 chip which is not explicitly rated for a 3V
Power Supply, therefore ../hardware/gschem/board.sch and
../hardware/gschem/board-dev.sch have been updated with a 3V compatible
device like the MAX3232CPE+. This chip allows a smaller blocking
capacitor and smaller charge pump capacitors as well.
Clearance of some forgotten vias has been adjusted to 15mil.
A spike shaped route has been improved.
Board’s version number in the pcb layout file has been set to: board-v1.1.1
A second linear power regulator has been added, which separates the Propeller’s supply from that of the SPI bus. That way, the chipflasher is independend from power failure due to high inrush currents when the target sysboard is powered.
That allows as well to enable the Propeller’s built-in Brown-Out-Detection: Pins keep a well defined level even if the supply voltage is not certain, a very usual situation during power-off.
Furthermore, a simple overcurrent and overvoltage protection has been
added right behind the USB power entry. A Polyfuse is used, which
limits the maximal USB current to about 1000mA. Currents of up to 500mA
are well in range, which is enough for all tested boards except the
ThinkPad-X60s sysboard. However, the latter still can be flashed
although current consumption is throttled to around 700mA by the
Polyfuse. (Note that the related developer board (board-dev.sch) is
equipped with a 0.025Ohms PowerShunt which facilitates overall current
measurement.)
NOTE: This version ships with a first elaborated pcb layout file, which is untested by the time of writing.
WARNING: To ease pcb layout, two pins have been twisted, thus requiring the updated firmware version v0.3.0 (See #../doc/version-history.md for details.)
The pnp transistor has been replaced by a pnp MOSFET, because when flashing the X220 the transistor gets too hot.
Add standard SPI chip layout examples, which are handy to have available when connecting the SPI-Cable.
Small bug fix: A junction had been misplaced.
Generate new devices numbers, they will be used in the bill of materials (bom.md).
Update SPI cable to new SPI connector layout.
WARNING: This should be regarded as a major hardware change! Upgrading your firmware is required!
This board supports more sysboards.
two port pins for sinking CE#
different propeller pin function layout
adjustable CE# pull-up
SPI connector is 9x1 again, but layout has changed
different base network of pnp transistor
big cap for SPI power (in conjunction with protection diodes from board-v0.4.0)
This board requires a firmware update.
Board with protection diodes across power regulator, in preparation for next board version.
First Tandem-Workshop. Board with different SPI connector, uses 5x2 pinheader.
Starts from RAM as well.
Reset line is DTR or RTS (optional).
First board that has been shipped for testing.
Initial board.
Handmade Chipflasher with Accessories
|<--- 80mm -->|
+---------------------------------------+ ---
| O ###### O | ^
| ###### | |
| [X] Power Switch ###### D1 o | |
| ###### | |
| o LED Power ###### D2 o |
-------+ ###### |
: USB | ###### D3 o |
: Power| ###### |
-------+ ###### |
| o SPI Power ###### |
| ###### _________|
| ####### ##/\## |SPI-Bus |
| ####### | |
|__________ Jumper | PLUG# | 100mm
|RS232 DTE| x DTR | GND |
| Labels | x RST | WP# |
|NC | GND| o RTS | MISO |
|RI | DTR| | CE# |
|CTS | TXD| ___ | MOSI |
|RTS | RXD| |R| | SCLK |
|DSR | CD | |e| | HOLD# |
|_________| |s| | VDD |
| |i| |________|
| ### |s| SPI LED o | |
| ### ### |t| | |
| ### ### |o| | |
| O ### ### |r| O | v
+-------------------- |…|---------------+ ---
^
Some first devices where manufactured, checked out at tag board-edition-1 on branch master.
These devices have been certified to respect computer users’ freedoms by the Free Software Foundation in Boston, USA.
First Series with sponsored PCBs
A non-critical bug can be fixed by soldering a short wire on the bottom side of the PCB:
One input pin was left floating by mistake, instead of tying it to ground level.
Manual Bug Fix on Bottom Side: Black Wire
The PCB layout that ships with the tag pcb-prototype on branch master has been milled into copper in order to prove suitability. However, using that file for production purposes is not recommended. Several fixes were necessary.
worked PCB layout
This is a short photo documentary of the hardware production process:
PCB milling has just finished
The copper board has been milled during an introductory workshop in the FABLAB Berlin.
PCB cleaned up
Cleaning the PCB is important, otherwise you will have to deal with dust located in the gap-routes when you want to apply clear varnish later.
Soldering difficulties on component side
Sockets and parts with a big footprint should not to be soldered to top layer pads, this turns out to be very difficult and tricky. For example, to solder an variable resistor, you will need to use a vacuum pump while pressing the part firmly onto the surface. When done, you are lucky if the pins are still connected. And note that for some reason drilling was not always centric.
How to solve soldering difficulties on component side
Top layer pads should be large, otherwise you will have to lever sockets or chips a bit in order to use their thin legs.
Assemblage complete
When the board is fully populated, don't forget jumpers!
Apply a clear varnish over all, but cover important contacts.
The PCB Prototype in action
It worked right from the start. What you can see here very well is the SPI-cable which uses distances for its wires, in order to prevent signal interferences. The target shown on the photo is a T500 motherboard.
Chipflasher “v2” and Accessories
Hardware Design Sources are licensed under CERN Open Hardware Licence Version 2 – Strongly Reciprocal, or any later version.
See CERN-OHL-S v2 User Guide to get guidelines on how to use these hardware designs for your own projects.
The Zerocat Chipflasher aims to be free-design as much as possible, that’s why it relies on the Parallax Propeller 1 microcontroller. In 2014, the chip design files of this controller have been released under GPLv3, by Parallax.
The PCB board-v2.0.0 as of commit fa7ba6995 has been tested successfully.
PCBs of other commits are UNTESTED!
See #../doc/board-version-history.md and #../hardware/CHANGES.md to track changes
Device Label
PCB (top view)
PCB (bottom view)
PCB “board-v2.0.0”, top view
CONN1: Power Jack for DC power input (5..6VDC @ 1A)
CONN2: Power Switch Connector
J1: SPI
J2: RS232 pinheader for data I/O
J3: Configuration Jumper for RST reset pin
U8: DIP Switch Block for easy firmware configuration
D1..D3: Program Status LEDs
D4: SPI Status LED
D5: SPI Power LED
Front Plate, Parametric 2D Vector Graphic, created with LibreCAD
Device Label, Scalable Vector Graphic, created with Inkscape
PCB layout file, created with PCB
Circuit Schematics, created with gEDA/gschem
PCB
../hardware/gschem/chipflasher-page01.sch
../hardware/gschem/chipflasher-page02.sch
../hardware/gschem/chipflasher-page03.sch
../hardware/gschem/chipflasher-page04.sch
../hardware/gschem/chipflasher-page05.sch
../hardware/gschem/chipflasher-page06.sch
../hardware/gschem/chipflasher-page07.sch
../hardware/gschem/chipflasher-page08.sch
Power Switch, Cables and Chip Pinouts
../hardware/gschem/chipflasher-page09.sch
../hardware/gschem/chipflasher-page10.sch
../hardware/gschem/chipflasher-page11.sch
../hardware/gschem/chipflasher-page12.sch
../hardware/gschem/chipflasher-page13.sch
Device Label
Acrylic Glass Front Plate (4mm, 100×80mm)
Hexagon Distances, Discs and Screws
PCB 100×80mm with Components
../hardware/gschem/chipflasher-page01.bom.html
../hardware/gschem/chipflasher-page02.bom.html
../hardware/gschem/chipflasher-page03.bom.html
../hardware/gschem/chipflasher-page04.bom.html
../hardware/gschem/chipflasher-page05.bom.html
../hardware/gschem/chipflasher-page06.bom.html
../hardware/gschem/chipflasher-page07.bom.html
../hardware/gschem/chipflasher-page08.bom.html
Power Switch, Cables and Chip Pinouts
../hardware/gschem/chipflasher-page09.bom.html
../hardware/gschem/chipflasher-page10.bom.html
../hardware/gschem/chipflasher-page11.bom.html
../hardware/gschem/chipflasher-page12.bom.html
../hardware/gschem/chipflasher-page13.bom.html
Test Clip SOIC8
Test Clip SOIC16
Test Socket DIL8
Chipflasher “v2”, first series
In October 2022, a set of first five devices is assembled:
PDFs, generated from source files via ../hardware/Makefile:
../hardware/artwork/board-label.svg.pdf
../hardware/gschem/chipflasher-page01.sch.pdf
../hardware/gschem/chipflasher-page02.sch.pdf
../hardware/gschem/chipflasher-page03.sch.pdf
../hardware/gschem/chipflasher-page04.sch.pdf
../hardware/gschem/chipflasher-page05.sch.pdf
../hardware/gschem/chipflasher-page06.sch.pdf
../hardware/gschem/chipflasher-page07.sch.pdf
../hardware/gschem/chipflasher-page08.sch.pdf
../hardware/gschem/chipflasher-page09.sch.pdf
../hardware/gschem/chipflasher-page10.sch.pdf
../hardware/gschem/chipflasher-page11.sch.pdf
../hardware/gschem/chipflasher-page12.sch.pdf
../hardware/gschem/chipflasher-page13.sch.pdf
Board Circuit Schematic, Page 1(13): Controller with RAM, of a free Design
Board Circuit Schematic, Page 2(13): Power Input
Board Circuit Schematic, Page 3(13): Voltage Regulators
Board Circuit Schematic, Page 4(13): SPI
Board Circuit Schematic, Page 5(13): Program Status LEDs
Board Circuit Schematic, Page 6(13): RS232 Pinheader
Board Circuit Schematic, Page 7(13): Serial EEPROM (optional)
Board Circuit Schematic, Page 8(13): Vcc_SPI Voltage Monitor
Board Circuit Schematic, Page 9(13): Power Switch
Board Circuit Schematic, Page 10(13): Y-USB Power Cable
Board Circuit Schematic, Page 11(13): RS232 Cable
Board Circuit Schematic, Page 12(13): SPI Cable
Board Circuit Schematic, Page 13(13): SPI Flash Pinouts
The chipflasher’s pair of programs uses the files chip2file.txt and
file2chip.txt to store and read chip data. When invocing connect,
you can pass alternative filenames, of course. Both files are processed
on a line by line basis. Each line is embedded into a pair of STX/ETX
characters which are stripped before the line data is stored on disk or
in the chip.
Reading chip data
In flash chips, data is stored byte by byte, in binary form. kick
casts that data into a format which is then received by connect
(the chipflasher’s host software) and stored on disk under the name
chip2file.txt. Payloads of just 0xff may be filtered in order
to accelerate data transfer. LF is used as line ending. The
one-line file header and footer may contain valuable information as
well.
Writing data to chip
Transform your ROM file into a supported data format and save it as
file2chip.txt. This file is used by connect for feeding data to
kick. All commonly used line endings are supported, i.e. LF,
CR and CR+LF.
Verification
It is always a good idea to read a chip twice and diff the
outputs, in order to verify that the received data is not
corrupted. Remember that chip2file.txt will be overwritten
without notice, so back it up if you don't want to loose your data!
The chipflasher’s data formats intend to be compatible with
srecord, the famous free software program collection by Peter Miller.
Some first sources of information are:
$ apropos srec_$ man srec_examples$ man srec_input$ man srec_cat$ man srec_motorola$ man srec_binaryThe srecord program collection supports a variety of data formats
like binary, hexdump and the Motorola S-Record which is the default.
The chipflasher menu offers the following line formats, which are
accessible through “t: toggle format”:
“S-Record”
Data is organized in lines of Motorola S-Record. The payload of each line is transmitted over the RS232 wire as binary data. This speeds up transmission. Each line contains a checksum which helps to check data integrity on the fly. This format is recommended.
“Hex-Dump”
Data is organized in lines of hexdata with an appended ASCII text
representation of bytes, human readable. Note the output of
srec_cat is understood by kick only if 0xffs are not
stripped out.
# create a backup of first readout
$ cp chip2file.txt backup.txt
# diff with second readout
$ diff backup.txt chip2file.txt
This is useful if you need to extract binary blobs in order to create
a new boot.rom with coreboot.
# Convert a Motorola S-Record into a complete map of your target chip.
# Use 0x800000 for 8MB chip sizes, 0x400000 for 4MB chip sizes, etc.
$ srec_cat chip2file.txt -fill 0xff 0x000000 0x800000 -o chip2file.bin -raw
# Convert a Hex-Dump into a complete map of your target chip.
# Use 0x800000 for 8MB chip sizes, 0x400000 for 4MB chip sizes, etc.
$ srec_cat chip2file.txt -hexd -fill 0xff 0x000000 0x800000 -o chip2file.bin -raw
# convert a binary boot rom file into Motorola S-Record
$ srec_cat boot.rom -raw -o boot.srec -obs 0x40 -esa 0x00
# strip 0xff bytes, but allow a runlen of 16 bytes
$ srec_cat boot.srec -uf 0xff 0x10 -o file2chip.txt -obs 0x40 -esa 0x00
# check file integrity before flashing
$ srec_info file2chip.txt
# convert a binary boot rom file into Hex-Dump
$ srec_cat boot.rom -raw -o boot.hexdump -hexd
# check file integrity
$ srec_info boot.hexdump -hexd
# prepare for flashing
$ cp boot.hexdump file2chip.txt
# strip all 0xff bytes from the boot file
$ srec_cat boot.srec -uf 0xff -o test0 -do
# convert the chip readout into same layout
$ srec_cat file2chip.txt -uf 0xff -o test1 -do
# diff the files, their data lines should match
$ diff test0 test1
# check file integrity
$ srec_info chip2file.txt -hexd
# convert the boot file into Hex-Dump for comparison
$ srec_cat boot.hexdump -hexd -uf 0xff -o test0 -hexd
# convert the chip readout into Hex-Dump
$ srec_cat chip2file.txt -hexd -uf 0xff -o test1 -hexd
# diff the files, they should match
$ diff test0 test1
If you need to fill memory areas with constant values, please use menu
option “I: flash file” with a prepared file2chip.txt file.
I.e., to fill page 3 of a paged 8MB SPI chip with 0xee, prepare your
file2chip.txt like so:
$ srec_cat -gen 0x000300 0x0000400 --constant 0xee -o file2chip.txt
To use random data, type:
$ srec_cat -gen 0x000300 0x0000400 --random -o file2chip.txt
Please refer to
to get to know more about srecord’s data generators.
Note some simple consumer SPI chips do not provide a chip erase
command. Their memory may be cleaned to 0xff by this method!
Thank you for trying Zerocat Chipflasher board-edition-1 with kick,
the first firmware!
Zerocat Chipflasher is your free-design hardware tool for flashing free firmware to BIOS chips. See #../doc/targets.md for supported chips and targets.
Parallax Propeller P8X32A free-design hardware controller
The core of the chipflasher...
Onboard EEPROM (non-free chip design)
May be used optionally for long-term firmware storage.
Power Switch, Power Status LED and SPI Power LED
The switch gives a good tactile feedback when powering the flasher and the LEDs clearly reflect the power status of the onboard regulators.
Software status LEDs
RST Pin is muted and allows starting from RAM.SPI-Bus Status LED (red)
When powered, the SPI-Bus is in use and the SPI chip is powered. Do not disconnect the SPI-Plug or test-clip if this LED is active!
Variable pull-up, allows to drive the SPI-CE#-line with a dedicated strength.
Use a screw-driver clockwise to adjust the pull-up to its highest value, thus resulting in the weakest driver strength. Then turn counter-clockwise until access to your target is reliable.
USB powered, typical load: 1.000mA maximum
In order to delimit power dissipation, an input voltage of 5VDC is recommended. Do not use any input voltages above 6VDC.
The typical load current won't exceed 1.000mA. Note the chipflasher board uses a Polyfuse which will shut off the board if drawing currents in excess of 1.500mA.
Data connection: RS232, pinheader-5x2
SPI connection: +3.3VDC/GND, pinheader-9x1
Handy dimensions (lenght x width x height) approx. 100 x 80 x 80mm
Pinout info for each connector right on the chipflasher’s front panel.
Accessories
Standard add-ons
Options upon request
The typical setup requires a host that has an RS232 serial port available, as the chipflasher board doesn't provide its USB port for data, it is used for power only.
Zerocat Chipflasher, typical setup with an Y-USB-Cable
We recommend to drive the flasher with a librebooted or corebooted 64bit X60 ThinkPad. These machines can be flashed with the flashrom user space utility. A serial port is part of their docking station.
A typical setup looks like this:
Computer with RS232 port, i.e.:
The Zerocat Chipflasher
supported SPI flash chip, a single one or one soldered in place on its system board (section #../doc/targets.md)
external USB-Power-Adapter (5V @ 1000mA) or at least two USB-ports from the computer.
You will use three cables for connection:
the USB cable for 5V power supply of the chipflasher board
(If you use two USB ports for power, use an Y-USB cable.)
RS232 data cable for data transfer between host and chipflasher
SPI-cable (8 wires, length about 20cm) with 8pin-DIL-socket or SMD-test-clip to attach the target SPI flash chip
+------------+ +-------------+ +·············+
| Host, i.e. | | Zerocat | +---------+ :
| X60 + | | Chipflasher |---+3.3V-->| SPI | :
| Docking |<--RS232-data-->| |<---SPI--->| Chip | :
| | | firmware: | +---------+ :
| software: | +--+5V--->| `kick' | : :
| `connect' | | +-------------+ : Systemboard :
+------------+ | : without :
+--------------------+ : Battery :
| External USB Power | : nor Power :
| 5V @ 1000mA | +·············+
+--------------------+
+------------+ +-------------+ +·············+
| Host, i.e. | | Zerocat | +---------+ :
| X60 + |<--RS232-data-->| Chipflasher |---+3.3V-->| SPI | :
| Docking | | |<---SPI--->| Chip | :
| |----+-+5V-USB-->| firmware: | +---------+ :
| software: | / | `kick' | : :
| `connect' |--+ +-------------+ : Systemboard :
| | : without :
+------------+ : Battery :
: nor Power :
+·············+
WARNING: Proceed on your own risk!
Discharge your body (touch any grounded metal like a water pipe) and make sure your are not electrostatically charged.
If you are flashing a sysboard:
Power and GND will be applied to the SPI-chip by the chipflasher board only.
Make sure you have not mixed these wires!
See ../hardware/gschem/chipflasher-page13.sch.png for pinouts.
To power the chipflasher:
You may safely use your computer’s USB port according to official specs if you are going to flash a single desoldered chip.
In case of flashing chips in situ, soldered onto sysboards, please use an external USB-Power-Adapter (5VDC @ 1.000mA).
As a workaround, you may try a non-standard Y-USB-Cable which should work well in many cases, as the maximal requested current per USB port typically won't exceed 500mA. See ../doc/power-profiles.md to get into details.
The Zerocat Chipflasher is a handmade tool with long wires/open case that may catch or generate electromagnetic interference. To give you an idea about clock pulse quality and speed, we probed the signals right at the test-clip for you. The maximal SPI clock speed should be above 2.5MHz.
Zerocat Chipflasher, typical clock pulse quality; here: 2.2MHz
The software connect and the firmware kick are talking to each
other via serial RS232 lines. Occasional transmission errors will
be repaired automatically. However, if you encounter severe connection
problems that render you helpless when trying to verify your data, boot
the host with WLAN and network switched off, make sure that no other
resource demanding process will start up (e.g. browser), and try again.
As long as the SPI-Bus Status LED (red) is not active, the SPI-Chip is not powered and you may feel free to connect/disconnect your target. However, if the LED is active, don't touch the connection!
If the system hangs for any reason, you should be save to kill the chipflasher’s power, because all SPI bus pins are configured to enter a harmless tristate mode right at brown-out or power-off. However, you might notice some flickering¹ of the SPI-Power LED, so better do not rely on that procedure.
¹ fixed with “Chipflasher v2” design
It is assumed that you have followed the steps mentioned in #../doc/README.md and now have two terminal windows available, with proper environments set up, i.e. Terminal#1 and Terminal#2.
Connect host and chipflasher with each other, i.e. attach the Y-USB-power-cable to two USB-Ports, attach the RS232-data-cable.
Attach the SPI-cable, but omit the target board (or chip) for now.
Switch the chipflasher device on and verify that the power status LED is bright.
Use a screwdriver to adjust the flasher’s CE# pull-up resistor to its clock-wise maximal position, that is to its biggest value.
Attach the free pinheader connectors of the SPI-cable to the SPI-Chip...
WARNING: You must not mix wires! See ../hardware/gschem/chipflasher-page13.sch.png and check pinouts in advance.
Change the directory to ease operation:
[env]$ cd ../host/start/
Get familiar with targets, provided by ../host/start/Makefile:
[env]$ make help
Get familiar with targets, provided by ../host/start/Workflow.mk:
[env]$ make -f Workflow.mk help
The flasher is operated via two terminal windows in parallel:
Terminal#1 is used to start and operate the flasher via menu.
In order to initiate the kick firmware upload into free-design
RAM, and to start the connect utility, type:
[env]$ make kick-v1-connect-115200-ram
[env]$ make connect-115200
The flasher’s menu should appear on screen:
Screenshot: Start from RAM
Terminal#2 is used to monitor in- and outgoing chip data.
Learn about typical, standard workflows and type:
[env]$ make -f Workflow.mk workflow-chip-read
[env]$ make -f Workflow.mk workflow-chip-write
Learn about typical workflows for targets with virtual 12MB chips:
[env]$ make -f Workflow.mk workflow-virtual-chip-read
[env]$ make -f Workflow.mk workflow-virtual-chip-write
Feel free to switch between terminals as required.
In Terminal#1, select d: probe chip in order to probe the
BIOS-chip for its ID:
Screenshot: Probe Chip
Use a screwdriver in counter-clock-wise direction to adjust the CE# pull-up resistor to smaller values until your chip gets clearly detected. See #../doc/targets.md.
Select ?: show menu to get a verbose menu output:
Screenshot: Show Menu
Select c: read chip in order to store chip’s content in your
first chip2file.txt.
WARNING: Consider to create backups between read operations, as
file chip2file.txt gets overwritten without prompt!
Switch to Terminal#2 in order to monitor and manipulate in- and outgoing chip data.
use predefined targets of ../host/start/Workflow.mk, for instance:
Type
[env]$ make -f Workflow.mk list
to get existing I/O files listed.
Continue to Operate the Flasher via Menu (Terminal#1)
You may now use the menu for dumping, erasing, flashing, verifying your chip. Check register bits for appropriate configurations.
WARNING: Proceed with care, you may brick your machine!
Potentially dangerous hotkeys are all upper case, thus
protecting you from accidental key hits as long as <CAPS-LOCK> is
inactive.
When using the menu, wait until your selected procedure finishes.
With q: cancel/(SPI-Bus off)/quit you may cancel it at any
time.
When done, hit q in order to quit connect.
NOTE: In case the SPI bus has been left powered after chip
detection due to volatile bits in status registers, it is powered
off as an intermediate step before you actually quit the program
with an additional q.
Detach the SPI-cables from the target SPI-chip and power off the flasher device.
Remember to plug a system board’s coin-battery back in.
Done!
Until now, we have taken care to always start from free-design RAM
using the make -C ../host/start/ kick-ram command.
The pre-flashed firmware in the onboard EEPROM has not been touched,
yet.
If you want to try the pre-flashed firmware, type:
[env]$ make -C ../host/start/ reset-kick
[env]$ make -C ../host/start/ connect-115200
If you want to upload a newly built firmware and make things permanent, type:
[env]$ make -C ../host/start/ kick-eeprom
connect (Terminal#1)Alternatively, you might invoke the connect utility manually:
Adjust the port pointer, e.g.:
[env]$ ln -sf /dev/ttyS1 ../host/start/tty_port_pointer
Clean and compile connect, the utility:
[env]$ make -C ../host/src/ clean
[env]$ make -C ../host/src/ connect
Configure and compile kick, the firmware:
[env]$ make -C ../firmware1/src/ clean
[env]$ make -C ../firmware1/src/ config-BOARD_V1
[env]$ make -C ../firmware1/src/ kick
Adjust baudrate and upload kick to RAM:
[env]$ make -C ../firmware1/start/ config-baud57600
[env]$ make -C ../firmware1/start/ kick-ram
Invoke connect with matching parameters, i.e.:
[env]$ ../host/src/connect\
../firmware1/start/chip-out.txt\
../firmware1/start/chip-in.txt\
../host/start/tty_port_pointer\
B57600
In order to process in- and outgoing data via
../host/start/Workflow.mk, update macros ROOT_HOST_IO,
CHIP2FILE and FILE2CHIP according to your choices.
Clean-up your custom configuration:
[env]$ make -C ../firmware1/start/ clean-config
Parallax provides a bunch of tools, i.e.:
PropGCC, the port of GCC (the GNU Compiler Collection) to the Parallax Propeller
OpenSpin, Spin/PASM compiler for the Parallax Propeller
PropLoader, a loader for the Parallax Propeller
SimpleIDE, a simple desktop environment (not essential, we recommend to use your favorite text editor)
"Simple Libraries", the Parallax Learn Simple Libraries subfolder workspace
The “Simple Libraries” folder is required.
File ../firmware/src/Makefile offers a target to clone the Parallax
Simple-Libraries repository, checked out at commit
c4f9a3e273002ec5e6f8b1d1ab95c14cb1823e82:
$ make setup-lib-parallax
The library folder will then be available as:
../firmware/src/parallaxinc/Simple-Libraries/Learn/Simple Libraries/
Subfolders are passed as arguments to propeller-elf-gcc.
More recent versions of this folder lead to bigger binaries and are not yet usable for the chipflasher firmware.
GNU Guix provides a very comfortable way to...
install the complete Propeller development suite from source
$ guix package --no-substitutes --install propeller-development-suite
use precompiled binaries, which is faster, like so:
$ guix package --fallback --install propeller-development-suite
If GNU Guix reports unset environment variables, you may set them automatically:
$ guix environment --ad-hoc propeller-development-suite
Please install the GNU Guix package manager on top of your system, if not already. The GNU Guix project recommends installation using the latest release binary, which can be downloaded here: http://www.gnu.org/software/guix/download/. The instructions are linked there too. Alternatly, run GNU Guix System.
With this binary package, all tools are bundled together.
The latest packaged release for GNU/Linux is 1.0 RC1 from 11-24-2014.
Until more recent source repositories of these tools will work, Parallax suggests to install this old binary package “SimpleIDE 1.0 RC1” as a fallback.
This package is too old for Trisquel 10.0.1, dependencies cannot be resolved :-/
Please visit page SimpleIDE Software for Linux, which provides binary packages for both, 32 and 64 bit architectures.
For your convenience, we provide a shortcut to the ZIP file here:
$ wget https://www.parallax.com/package/simpleide-software-for-linux-propeller-c/?wpdmdl=3349 \
-O SimpleIDE-Software-for-Linux-Propeller-C-3349.zip
$ unzip SimpleIDE-Software-for-Linux-Propeller-C-3349.zip
For your convenience, we provide our backup of former installation instructions, that are known to work.
Linux Directions, as adapted from Parallax
Supports Debian, Mint, and Ubuntu Linux (Intel 32/64bit)
Please note the dollar sign ($) represents the command prompt in
the steps below. If you see $ command, it means enter command
in your command terminal window. Installation requires using the
Linux Terminal. The steps below assume you’re logged in with a
user account (non-root access) but do know the root password.
NOTE: In Trisquel7, use $ sudo -s to become root.
To Install:
Download appropriate .deb package (i386 for 32bit systems or i686/amd64 for 64bit systems)
Open a terminal and CD to the download folder
Enter $ sudo dpkg -i simple-ide_1-0-1-rc1_amd64.deb
(adjust the filename to match what was downloaded)
a. You may get errors due to dependencies, the next step will take care of that.
Enter $ sudo apt-get install -f
Answer yes Y as required to install dependencies
If your user account is not part of the dialout group, you
must add it or propeller-load won’t be able to download to
the Propeller
a. Enter $ sudo adduser ${USER} dialout
b. Log out from the system completely, then log back in for permissions to take effect
To remove the package, use $ sudo apt-get remove simpleide
Original repositories of the first bundle release (SimpleIDE 1.0 RC1):
SimpleIDE, the Desktop Environment:
Simple-Libraries, contents of the SimpleIDE workspace folder and
its Parallax Learn/Simple Libraries subfolder:
PropGCC, the port of GCC (the GNU Compiler Collection) to the Parallax Propeller:
https://github.com/parallaxinc/propgcc/
As stated by Jeff Martin from Parallax, the content at the tip of the release_1_0 branch should match the proper sources:
OpenSpin, open source compiler for the Spin/PASM language of the Parallax Propeller:
PropLoader, a loader for the Parallax Propeller:
These are newer repositories from David Betz.
propeller-gcc compiler:
https://github.com/dbetz/propeller-gcc
Switching over to these sources was not yet successful.
propeller-load:
Until these repositories will work, Parallax suggests to install the old binary package “SimpleIDE 1.0 RC1” as a fallback.
Zerocat Chipflasher is designed for flashing BIOS chips reversely, that is: Power is applied to the chip, thus sending currents into the system board backwards.
Note that the power traces around the BIOS chip surely are not designed for the currents that some system boards (X60, T60) will draw. If we power the BIOS chip, some target system boards will draw much more current that would probably be needed to flash successfully. Therefor, we need kind of current limiting circuit. Examples: X60, T60
The only current limiting 'control' that we do have, is: - the Polyfuse - the capability of the regulator in use - the scope of the incoming power
The Polyfuse seems to get hot for currents above its hold current, thus already limiting the current. Higher currents make the device to shut down the board after a while, thus leaving a small time window where we can take action (i.e. T60).
This time window could be used multiple times if we allow the fuse to cool down in between. This is very annoying and makes that flashing procedure slow as we are flashing sector by sector, but note the main goal should be not to damage the target system board!
Unfortunately, the chip’s supply voltage of a T60 doesn't reach its minimal value of 2.7V with supply currents below 2 Ampères – bigger currents would probably destroy the board and doesn't seem to help anyway.
Therefore, we won't be able to flash a T60 safely within specs by driving power backwards into the sysboard :-(
However, when using a combination of an LD1117-3.3 (800mA) voltage regulator, 1000µF power capacitor and a Polyfuse RXEF075, we can flash and read the T60 in one go with a chip supply voltage around 2.5V, which is not too bad!
We should be able to boot coreboot and then flash a second time from user space, within specs.
TODO: Let’s try Peter Stuge’s method as well.
TODO: Monitor the overall current or Polyfuse heat or even better add a dedicated current limiting circuit for the SPI Bus.
The power shunt in board-dev.sch allows us to monitor the overall return current.
Current = Voltage across Power Shunt / Power Shunt’s Resistor Value
If not otherwise noted, the CE# pull-up is adjusted to its maximal value (245Ohms).
NOTE: Note that the selected Polyfuse RXEF075 is getting hot beyond 0.019V and would trip immediatly at 0.038V (1500mA). However, the voltage regulator in use is not capable of supplying more than 1000mA.
overall current up to 1000mA
T60-2MB-Atmel (SOIC8):
0.0245V; Vdd_SPI = 2.7V –› 2.55V ––› 2.49V –––› 2.47V
X60s-2MB-SST (SOIC8):
0.023V; Vdd_SPI >= 3.0V
overall current up to 500mA
GA-G41M-ES2L (SOIC8):
0.0125V
T500-Winbond-8MB (SOIC16):
0.0075V; CE# pull-up approx. 100Ohms
T400-Macronix-8MB (SOIC16):
0.0075V; CE# pull-up approx. 100Ohms
X200-Atmel-4MB (SOIC8):
0.0068V; CE# pull-up approx. 100Ohms
X220-8MB-Winbond (SOIC8):
0.0065V
X200-Macronix-8MB (SOIC16):
0.0065V;
X200-Winbond-8MB (SOIC16):
0.0063V; CE# pull-up approx. 145Ohms
overall current up to 200mA
D945GCLF (SOIC8):
0.0039V
X230-Macronix-8MB-4MB (2x SOIC8):
0.002V
As we are using USB ports as unclassified devices, we are not allowed to draw more than 100mA per port (200mA in total) if we want to stay within official USB specs. Thus the chipflasher needs to be self-powered through an external power supply for targets that take more current.
However, if we don't care about official USB specs, using two USB ports with a non-standard Y-USB-Cable works just fine as well on a ThinkPad X60.
This docking station seems to have very robust USB-Ports which can deliver up to 2.2Amps before a crowbar protection gets active. Then they are dead until you reboot after a while.
+----------------+
+--------------+ | '''''' <-DIPSW | +·············+
| Host, i.e. | | 654321 | : :
| X60/T400 |===++==+5VDC==>| | +---------+ :
| + Docking | // | Chipflasher v2 |==+3.3VDC==>| SPI | :
| |=++ | |<---SPI-/6->| Chip | :
| Utility: | | LED D4: o | +---------+ :
| `connect' or |<--RS232-/5--->| | : Systemboard :
| `flashrom' | | Firmware: | : without :
+--------------+ | `kick2' | : Battery :
| | : nor Power :
| LED D5: o | : :
+----------------+ +·············+
+----------------------------+
| External Power Device |
| 5-6VDC @ 1000mA |
| 5.5/2.1mm barrel jack plug |
+----------------------------+
||
|| +----------------+
+--------------+ || | '''''' <-DIPSW | +·············+
| Host, i.e. | || | 654321 | : :
| X60/T400 | \\==+5VDC==>| | +---------+ :
| + Docking | | Chipflasher v2 |==+3.3VDC==>| SPI | :
| | | |<---SPI-/6->| Chip | :
| Utility: | | LED D4: o | +---------+ :
| `connect' or |<--RS232-/5--->| | : Systemboard :
| `flashrom' | | Firmware: | : without :
+--------------+ | `kick2' | : Battery :
| | : nor Power :
| LED D5: o | : :
+----------------+ +·············+
kick2/flashrom Configuration TableOn ‘board v2’, the onboard DIP switch block is honoured by kick2/flashrom upon start, only.
On ‘board v1’, parameters default to preset values.
In any case, file ../firmware2/src/Makefile can be used to customize configurations.
| `kick2/flashrom` | `kick2/flashrom` on ‘board v2’
| ‘board v1’ |
|--------------------|-------------------------------------------------------------------
Function | defaults | DIP Switch Nº | o = open, x = closed
----------------------------|--------------------|-------------------|-----------------------------------------------
SPI Clock Driver Strength | 50% | DIP Switch 1..2 | oo = 25%, xo = 50%, ox = 75%, xx = 100%
SPI Mode 0 or 3 | Mode 3 | DIP Switch 3 | o = Mode 3, x = Mode 0
RS232 Baudrate | 115200 | DIP Switch 4 | o = 115200, x = 57600, per Makefile = 38400
SPI Power Suspend | allow | DIP Switch 5 | o = allow, x = inhibit
SPI Power-up Pulse Type | repetitive | DIP Switch 6 | o = one shot, x = repetitive
kick2/connect Configuration TableFirmware kick2, interfacing connect, uses a fixed configuration.
However, RS232 baudrate setting can still be configured per Makefile.
| `kick2/connect`
|-----------------------
Function | fixed configuration
----------------------------|-----------------------
SPI Clock Driver Strength | 100%
SPI Mode 0 or 3 | Mode 3
RS232 Baudrate | 115200
SPI Power Suspend | allow
SPI Power-up Pulse Type | repetitive
kick/connect Configuration TableFirmware kick, interfacing connect, uses a fixed configuration.
However, RS232 baudrate setting can still be configured per Makefile.
| `kick/connect`
|-----------------------
Function | fixed configuration
----------------------------|-----------------------
SPI Clock Driver Strength | 100%
SPI Mode 0 or 3 | Mode 3
RS232 Baudrate | 115200
SPI Power Suspend | allow
SPI Power-up Pulse Type | one shot
To get you started, quickly:
You are dealing with electrostatical sensitive devices, observe precautions!
Hook up all cables to your device.
Connect device to host’s RS232 port.
Switch device on.
Make sure LED D4 (SPI Status) is off, then attach SPI cable to target board or chip, if any. Your target must not be powered by battery or AC adapter. Unplug small coin battery, if any.
To start quickly:
To start, using connect, type:
[env]$ make -C ../host/start default
The flasher’s menu should appear on screen.
Use a second terminal to set up guix environment as before, then type:
[env]$ make -C ../host/start -f Workflow.mk help
To get typical workflow information for a single chip read procedure, type:
[env]$ make -C ../host/start -f Workflow.mk workflow-chip-read
To start, using flashrom, type:
[env]$ make -C ../host/start kick2-flashrom-115200-ram
[env]$ make -C ../host/start flashrom-115200
This performs a probe with flashrom, same as with:
[env]$ flashrom -p serprog:dev=../host/start/tty_port_pointer:115200,spispeed=40M -V
Adapt command line options for read, erase, write and verify
operations according to your needs. Please note that flashrom
resets SPI configuration registers without asking for user’s
consent!
Now process your data...
Get folders and configuration cleaned:
[env]$ make -C ../host/start clean
To see more options, type:
[env]$ make -C ../host/start help
When done with your target, make sure LED D4 (SPI Status) is off, then detach SPI test clip.
When done with the device, switch it off.
This is a short list of software tools which are required...
If GNU Guix is available or if you are on GNU Guix System, type
$ guix environment --pure -m guix/manifest.scm
to create a shell environment with all prerequisites set up. In case anything fails, the manifest file provides guix channel information to ease replication of guix itself.
Note this project is developed on GNU Guix System, thus the most recent state of art might fail on Trisquel due to unsupported tool versions, e.g.:
The gEDA-project is not available on Trisquel 10.0.1
Parallax’ SimpleIDE binary packages are too old for Trisquel 10.0.1
Please consider to install the GNU Guix Package Manager on top of Trisquel.
GNU/Linux-libre Operating System like Trisquel or GNU Guix System, with access to an RS232 serial port
Command-line Interpreter (Shell)
Dash, POSIX-compliant /bin/sh implementation that aims to
be as small as possible
GNU Bash, command-line interpreter of the GNU system; it
allows most sh scripts to be run without modification
The project’s Makefiles set their SHELL Variable to /bin/sh.
On Trisquel, /bin/sh points to /bin/dash
(Debian Almquist Shell) by default,
whereas it points to GNU Bash on GNU Guix System.
The echo built-in of those shells differ, therefore the Makefiles
make use of GNU Coreutils’ echo binary.
GNU Coreutils, basic command-line tools that are expected in a POSIX system, excluding shell
GNU Diffutils, comparing and merging files
Glibc, the GNU C Library
GCC-Toolchain, the GNU Compiler Collection and its tool chain for C/C++ development
GNU Make, remake files automatically
GNU Sed, non-interactive stream text editor
Git, free distributed version control system
The gEDA/gaf subset of tools from the gEDA-project, a full GPL'd suite and toolkit of Electronic Design Automation tools
PCB, interactive tool for editing printed circuit board layouts
Gerbv, viewer for files in Gerber format (RS-274X) and Excellon drill files
Inkscape, vector graphics editor, version “1.1 (c68e22c387, 2021-05-23)”
ImageMagick, create, edit, compose, or convert bitmap images
SRecord Program Collection, ROM image manipulation software
Your favorite text viewer or editor, i.e.:
Your favorite web browser, i.e.:
Your favorite PDF viewer, i.e.:
Computer-aided design (CAD) application, i.e.:
Free Firmware Projects
It makes a difference whether you attach a discrete SPI flash chip to the chipflasher or whether you connect a chip-in-situ, which is soldered onto a system board. In the latter case, you will have to test a real life condition - just developing according to chip’s datasheet is not sufficient. Please compare to: ../doc/power-profiles.md
This file lists chips and system boards that have been successfully tested.
TODO: For some chips, the block protection mechanism is not fully supported.
TODO: We focus on Standard-SPI. Dual-SPI or Quad-SPI is not implemented.
Please compare to: ../firmware/src/libkick/chipspec.c
kick2AT26DF321 (Atmel)
Chip erase may be broken according to datasheet. Use block batch erase instead.
MX25L3206E (Macronix)
AsRock E350M1 with socketed W25Q32FVDAIQ (Winbond)
We used the 8-pin DIL socket adaptor for flashing. Then the chip was inserted onto the sysboard.
Gigabyte GA-B75M-D3H Desktop Board with 2x MX25L6405D (Macronix)
Gigabyte GA-G41M-ES2L Desktop Board with MX25L8005 (Macronix)
Intel Desktop Board D945GCLF with W25X40 (Winbond)
NOTE: You may set bit SRP in the status register to enable WP# control.
ThinkPad T530 and W530 with MX25L6406E + MX25L3206E (Macronix)
Use Pomona SOIC8 Clip (Model 5250).
The upper chip#2 is hidden below the inner cage, you have to disassemble the motherboard completely.
Remove RAM modules and CPU.
The lower chip#1 seems to interact with the motherboard when being powered or accessed for erase/write for a while. It does not provide a proper feedback via WIP bit, thus the end-of-write-cycle has to be guessed:
Select “timeout” as WIP check method
ThinkPad T520i with W25Q64FV (Winbond)
Simply remove palm-rest and use Pomona SOIC8 Clip (Model 5250).
ThinkPad T500 with W25X64VSFIG (Winbond)
TODO: ThinkPad T500: Flashing works fine, however booting has not been tested yet.
ThinkPad T430s
Note a clip cannot be used, wires have to be soldered to chip’s pins.
ThinkPad T430
with MX25L6406E + MX25L3206E (Macronix)
Use Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
ThinkPad T420
with MX25L6406E (Macronix)
Use Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
ThinkPad T400
ThinkPad X1 Carbon Gen1
with EN25QH64 (EON) + MX25L3205D (Macronix)
Pomona SOIC8 Clip (Model 5250) required for upper 4MB chip. Lower 8MB chip can be flashed with Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
ThinkPad X230t (Tablet)
with MX25L6405D + MX25L3205D (Macronix)
Use Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
ThinkPad X230
with EN25QH64 (EON) + EN25QH32 (EON)
Use Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
ThinkPad X220 with W25Q64FV (Winbond)
Use Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
ThinkPad X220 with AT25DF641 (Atmel)
Use Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
Use kick2, the second firmware approach.
This chip has volatile registers, Hardware Write Protection cannot be applied via jumper.
ThinkPad X201 with MX25L6445E (Macronix)
Use Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
ThinkPad X200s
TODO: ThinkPad X200s: We had successfully flashed one X200s some time ago, but don't remember the chip type. We believe that all types would work, but this has to be checked.
ThinkPad X200
ThinkPad X200 with AT26DF321 (Atmel)
Chip erase may be broken according to chip’s datasheet. Use block batch erase instead.
ThinkPad X200t (Tablet)
with W25X64VIG in WSON Package
Note a clip cannot be used, wires have to be soldered to chip’s pins.
ThinkPad T60 with MX25L1605D (Macronix) and ATI Graphics (Mobility Radeon X1300).
Use Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
The chipflasher’s power regulator for the SPI Bus will get hot. Please use the flasher in a cool environment or blow some air around it during the readout or flashing procedure. Additionally, remove systemboard’s CPU and RAM Modules from their sockets.
Firmware kick2 of v0.6.7 offers automated SPI Bus pausing to
releave power regulator U7, thus avoiding too low voltages
and overheating.
ThinkPad T60 with AT26DF161 (Atmel), Intel GPU only.
NOTE: Flashing works fine although chip’s supply voltage stays around 2.5V and thus doesn't reach proper specs.
Firmware kick2 of v0.6.9 supports volatile registers and offers
automated SPI Bus pausing to releave power regulator U7, thus
avoiding too low voltages and overheating.
ThinkPad T60 with SST25VF016B (SST), Intel GPU only.
NOTE: Flashing works fine although chip’s supply voltage stays around 2.5V and thus doesn't reach proper specs.
Firmware kick2 of v0.6.9 supports volatile registers, Auto
Address Increment Word Program, and offers automated SPI Bus
pausing to releave power regulator U7, thus avoiding too low
voltages and overheating.
ThinkPad X60/X60s (32bit/64bit)
Use Pomona SOIC8 Clip (Model 5250) or SOIC16 Clip (Model 5252), both work fine.
Firmware kick2 of v0.6.7 offers automated SPI Bus pausing to
releave power regulator U7, thus avoiding too low voltages
and overheating.
with SST25VF016B (SST)
Chip detection does not work reliably. Use a fast train of consecutive trials until chip is detected. This chip has volatile registers and is kept powered. The flasher’s voltage regulator U7 is getting hot, but should continue proper operation. However, it might be a good idea to give him some rest and withdraw SPI bus power between consecutive readouts. @bug Proper cooling required for regulator U7.
with MX25L1605D (Macronix)
These laptops are of special interest, because they have the same CPU-Chipset combination (Core Duo or Core2Duo and i945 Northbrigde) as the ThinkPad X60, which is known to lack the Manageability Engine completely. Unfortunately, these machines are not yet supported by coreboot.
Please compare to: https://www.coreboot.org/Laptop
ASUS S96F/Z96F (unknown flash chip)
Acer Aspire One ZG5 (Winbond 25x80AVSIG)
Winbond SPI Flash. Size is 8Mbit (1Mbyte), organized in 256 sectors à 4Kbyte, pages of 256 bytes. Status register protection bits are static, thus hardware write protection would work. Besides "Standard SPI", this chip features "Dual Output SPI".
Fujitsu S. Lifebook S7110 (Spansion S25FL008A)
Spansion SPI Flash. Size is 8Mbit (1MByte). Status register protection bits are static, thus hardwired write protection would work. Note that memory is organized in 16 sectors à 512Kbit. Pages have 256 bytes.
Getac P470 (unknown flash chip)
HP/Compaq nc6320 (M25PE80)
Micron SPI Flash. Size is 8Mbits, sectors à 4Kbyte, pages are 256 bytes. Features 16 bytes unique ID code(!). Hardware write protection should work. Features flexible software protection modes.
MSI Wind U100 (MX25L8005)
Macronix SPI Flash. Already supported, but not yet tested in situ. Size is 8Mbit (1Mbyte), 256 sectors à 32Kbit (4Kbyte). Status register protection bits are static, thus hardwired write protection would work.
Roda Rocky III+RK886EX (SST49LF080)
SST LPC (Low Pin Count) Flash, 32 pins. Size is 8Mbit. Pins WP# and TBL# provide hardware write protect for entire chip and/or top boot block. Features 5 GPI pins for system design flexibility.
Note the LPC Bus is not yet supported by the chipflasher.
This history gives you a version overview of the chipflasher firmware,
software and documentation – in contrast to its hardware, which is
represented by files under the ../hardware folder. To see the version
history of the hardware, please check #../doc/board-version-history.md
instead.
v<major>.<minor>.<revision>[-<number-of-new-commits>-<commit-hash>]
NOTE: Tags are using the first three numbers only, i.e. v0.1.0.
v – This letter indicates a version tag.<major> – The resulting product is a major change or upgrade.<minor> – Additional functionality or new features are introduced.<revision> – Bug fixes, minor changes, graphical stuff.-<number-of-new-commits>-<commit-hash> – commit description as
retrieved with git describe, but git specific ‘g’ marker stripped
off, e.g.: -79-g7ccc6034 -> -79-7ccc6034A fully qualified version description thus might look like this:
v0.4.10-79-7ccc6034
General
../doc/THANKS.mdHTML Documentation
Review documentation structure, create one main entry point, link other documentation roots via Home button, move some buttons, update chip documentations, use just one theme configuration file.
Fix name of TTY port pointer.
Makefiles
Improve readability, rename macros, strip white spaces, improve recipes to catch errors, use automatic variables without parantheses, mute recipe outputs.
Support the generation of a project archive.
Refine recipe for automatic collection of copyright notices.
Improve device operation:
Use ../host/start/Makefile to configure, compile and upload
firmware and get started.
Use connect and ../host/start/Workflow.mk to process in- and
outgoing data.
Use flashrom.
Board Configuration File
Kit User Guide
Firmware1 (kick)
kick: firmware1kick.Firmware2 (kick2)
*.spin files.Host utility connect
connect
session.kick and kick2 into account.The Makefile in ../firmware/src/ offers targets config-BOARD_V1 and
config-BOARD_V2, which help you to configure the firmware for the
chipflasher board (board v1, default) or the testboard (board v2).
The new features of the testboard – SPI voltage monitor, DIP switch
configuration block, RST pulse detector, hardwired board version – are
not yet supported by kick.
File ../firmware/src/libkick/proppins.h offers different pin usage for
board v1 (chipflasher) and board v2 (testboard).
Improve test for proper inkscape version.
Fix clean target in respect to usage of hash character.
Note project’s incompatibility with Trisquel 10.0.1, as some packages are too old or not provided. The GNU Guix Package Manager should help.
Maintain Makefile compatibility with dash, as used on Trisquel.
Update shortcuts to match URLs of new Parallax Website.
Adapt Makefiles for buggy GNU Make < 4.3: Finalize commands within $(shell) function with semicolon.
Update list of supported targets and point to kick2, the second
firmware approach, see ../firmware2/doc/NEWS.md:
This version takes advantage from updated files under ../hardware/,
see ../doc/board-version-history.md.
#../doc/chipflasher.md shows detailed circuit information
and refers to generated HTML BoM files.gschem and pcb
files, and archives.../guix/manifest.scm has been updated for better gschem
support.../doc/targets.md: Point to kick2 cooling features for
targets X60 and T60. See file ../firmware2/doc/NEWS.md.../host/src/ANSI-color-escape-sequences.h.Branch firmware2-wip has been merged into master.
As a result, the second firmware approach called kick2 is available
in ../firmware2/src/, whereas the default firmware called kick is
offered in ../firmware/src/ just as before.
Both programs are configured to start with an interface to connect,
this project’s own host utility.
Follow advices in ../doc/README.md to build the complete
documentation.
If interested in trying kick2 with its interface to flashrom,
checkout branch flashrom-interface and see what has been achieved.
../doc/README.git log output.Add image titles.
Add screenshots.
Change the documentation system:
It is based on Zerocat Project Template v0.0.10 and has then been improved. Copyright has been transferred to collected project authors.
Add new features, improve functionality, finalize the interface:
Refine prompt usage, display input level at D1 (green LED). Display activated key options within prompt. Show menu upon request only. Improve key input, catch control keys in order to avoid corrupted input.
Review and rename several files, functions, types and variables.
New devices supported via timeout:
New devices supported:
Clean up documentation files, fix markdown syntax and style:
List of software tools has been refined, e.g.:
inkscape@1.1make@4.3File @ref host/guix/manifest.scm can be used with guix environment
to prepare a pure environment.
Makefiles improved:
v1.2.0-5-c4f9a3eSome fixes applied:
clean up macros, set up OUTC() in conjunction with OUTC_DEBUG
increase buffer sizes in @ref host/src/connect.h to enable larger line transmissions
review ledstat() in @ref firmware/src/kick.c, improve set of macros in @ref firmware/src/kick.h
fix obsolete and wrong pin descriptions in @ref firmware/src/libkick/proppins.h
This version is ready to be run on GNU Guix System.
Cherry-picked commit: Adjust type qualifier in
firmware/src/kick.c and save some bytes, so that the full
version number won't make the binary exceed 29000 bytes.
Tiny fixes in RS232-cable-pinouts.md
Rolling version number
Updated documentation, reviewed list of software requirements
Improved set of Makefiles, ready to be run on Trisquel or GNU Guix System
Makefiles: Detect non-available utilities and exit with error status
File firmware/src/Makefile, provide targets to download Parallax’
Library Archive
Use logo image with black background, as old transparent background causes confusion
This version basically comes with an improved set of Makefiles and
configuration files, most prominently ../host/src/Makefile and
../host/start/Makefile. The first builds the entire software, the
latter is what you need to operate the chipflasher: It lets you load
the firmware, start the menu, and helps to deal with in- and outgoing
chip data. The documentation has been updated. Utility scripts have
been deleted and bash has been removed from the list of tool
requirements.
The buildchain automatically retrieves the softare version from tag
PROJECT_NUMBER in ../doc/doxygen-resources/Doxyfile.orig.
Makefiles consistently offer a help and a hello target.
Prototypes for ledstat() and burn() have been changed in order to
address compiler warnings.
Boards X230t and X201 have been tested and are now listet in
supported-devices.md.
Chip MX25L6445E, found on X201, is now part of the IDJEDECMX25L6445E06E05D chip definition.
This version basically comes with an improved documentation
buildchain, as ../doc/Makefile and ../hardware/Makefile
have been enriched to provide better results. Visual feedback during
the make has been added. Some important settings are retrieved from
the ../doc/doxygen-resources/Doxyfile.orig directly. The documentation
buildchain is using /bin/sh for subshells.
The ../doc/frontpage.md now refers to all four Makefiles, i.e.
../doc/Makefile, ../hardware/Makefile,
../firmware/src/Makefile and ../host/src/Makefile.
File ../doc/board.md provides automatically generated labels as a PNG
and PDF file.
File ../doc/software-tools.md
List shells dash (/bin/sh) and bash (/bin/bash) as a
requirement, as usage of bash has not yet been dropped
completely.
List Inkscape as a requirement.
Exclude files that produce strange results with doxygen.
Review configuration files and makefiles, fix dependencies.
Improve error handling in startfile.mk.
Fix english spelling (i.e. whether, separate).
Fix lists’ indentation in change log files ../doc/version-history.md
and ../doc/board-version-history.md.
Rename files, use lower case for startfile.cfg and startfile.mk,
but add Startfile.mk as a symbolic link to provide backward
compatibility.
Drop function do__WIP_polling() in ../firmware/src/kick.c, which saves some
bytes and keeps RAM usage below 29000 bytes.
Merge branch wip, increase chipspec.c database, update
../doc/supported-devices.md.
Apply a consistent documentation header pattern for all files by
forcing doxygen to use the C-parser with unsupported filename
extensions. Turn comment lines marked with ##> or ;;> into
C-style comments beforehand. Use \@cond..\@endcond directives to
avoid parsing of non-C code.
Review the documentation, improve the doxygen outcome, set up new groups aka modules.
Use ../doc/files.dox, ../doc/modules.dox and ../doc/images.dox
to improve the documentation.
Drop struct member pagesize from chip’s database, which saves some
bytes. If command X02_PP is available for the chip in question, use
a hardcoded pagesize of SIZE_256 instead.
Add support for chips EN25QH54 and MX25L12835E. The former is occasionally found on an X230, the latter is very common for the T430s.
Add read support for security registers, which are accessible via
X2B_RDSCUR and X2F_WRSCUR commands on some chips. Security
registers are displayed in conjunction with status registers, using
menu option [r] show register values. Write access is not yet
implemented.
Update and fix database in ../doc/supported-devices.md.
Update version and copyright time range in license header message.
Fix reference to webpage in ../doc/README.md, reflect state of
maintenance.
Use more descriptive menu option strings.
Adapt text color and provide better contrast with default trisquel8 terminal settings.
Remove experimental function declaration, which produces a gcc warning.
Add Zerocat Favicon to generated documentation.
Improve documentation related to Propeller toolchain setup.
Modify header strings, use one version only for both, connect and
kick.
Provide clip info for X60.
Add X200 Tablet to list of supported devices.
Move improved script utilities into newly created folder ../host/util.
Modify chip database in order to securely support the ThinkPad T430 and its Macronix SPI chips.
Add GA-B75M-D3H Desktop Board to list of supported devices (readout tested only).
File ../doc/parallax-tools.md: Update with most recent GNU Guix Version.
NOTE: This version works best with board versions board-edition-1 and board-v1.2.0.
File ../doc/parallax-tools.md: Provide exact software version infos
File ../doc/Makefile: Add some .PHONY targets in order to facilitate
Zerocat’s website build process
Direct users to Zerocat Website in order to get shop information
Remove branding of suggested or recommended hardware
Small fixes within the documentation
In the documentation, references to the chipflasher webpage now point
to: http://zerocat.org/chipflasher-board-edition-1.html
Macro VERSION is introduced which helps to emit the software’s
version on screen. This macro should match PROJECT_NUMBER tags
of doxygen’s *.orig config files in ../doc/doxygen-resources/.
Bug fix: Job cancellation requests are processed even in case of transmission timeouts.
In several functions, flow control and feedback loop has been reviewed.
A compiler switch has been added to facilitate experimental re-allocation of line buffer space on the fly.
Handling of internal error codes has been simplified.
On startup, connect now checks whether the serial port is already
busy.
Due to trademark concerns, a “Zerocat Logo License” has been added to the set of licenses. This license has been inspired by Trisquel’s Logo Page.
The reset pulse issued by connect has been extended in order to
make an MAX3232EPE+ chip start reliably.
Dependencies for the documentation build process have been fixed in order to avoid doxygen error messages.
Chip detection has been fixed (i.e. ThinkPad T60) and improved, a zero JEDEC ID due to power failure or misplaced SOIC clip is handled with an individual message.
This version works best in conjunction with board version board-edition-1, please compare to #../doc/board-version-history.md.
The chip database has been reviewed. The default entry is used as unknown chip without capabilities, thus increasing security against accidental key strokes. T60’s BIOS chip has been added. Bits of status registers are now each tagged as volatile/static.
Global sector protect/unprotect features are now supported for Atmel chips as well.
The chip readout function has been deeply improved; transmission
errors are now reliably detected by connect and the data lines in
question are resent by kick upon connect’s request.
Obsolete features like increase/decrease UART FiFo Size and UART IRQ Latency have been deleted; they didn't work anyway.
Transmission status report now follows a three color pattern known from traffic lights. You will be able to grab the status at a glance:
Probing the chip with menu option [d] now works more reliable, for it
automatically issues three subsequent trials.
Error report has been improved, a missing file for data storage on disk will be reported.
The menu status line has been relieved from obsolete infos.
Three script utilities have been added to folder ../host/src/.
In order to make it quit more reliably, kick’s exit sequence is
repeated.
This version works best in conjunction with board-v1.1.0.
Note that older boards may still be used, but the configuration file should be modified according to twisted pin functions.
Nets PINPNP and PINPLUGTESTn have exchanged their pin numbers.
A small delay has been added in SPI_ini(), thus making the
Gigabyte GA-G41M-ES2L sysboard accessible.
The menu option '[q] - quit/cancel' will now switch the SPI bus off as an intermediate step in case it has been left powered for devices with a non-static status register.
A wrong copyright note has been reverted.
Improve hardware documentation...
Make the chipflasher repository freely distributable...
Yep, this is a real version! It comes with a complete set of licenses.
File ../doc/README.md explains how to start and the license setup.
Source files are enriched by appropriate license headers.
A license hint is provided when connect starts up.
Codesize has been further reduced to guarantee enough runtime RAM.
All documentation source files have been reviewed, sections have been rewritten.
A screenshot of an invocation example had been added to ../doc/images/.
The folder doc-generator/ contains reviewed doxygen resources and
an updated Makefile. All generated documentation output will be
created in doc/.
Unfortunately, version v0.2.1 introduced a severe bug, due to exorbitant HUB-RAM usage. The system will hang. This commit reverts the commit that introduced that bug and reduces code size by 20 bytes. Now, flashing should work fine although we are still pretty much at the edge.
Important bugfixes for chip readouts:
An address roll-over will now be catched.
The Motorola S-record format now comes with an inline-0xff blob of up to 16 bytes, thus decreasing transmission overhead.
In contrast, the Hex-Dump format is a real dump. Each byte is listed.
New features:
The mode that is used to deal with 0xff bytes is shown in the menu status field.
The roll-over feature when scrolling up/down with some menu options has been removed to reduce confusion.
This version must be used with board-v1.0.0 and later, however board-v1.0.5 is recommended due to its pnp MOSFET.
This version may be used with all v0-boards (i.e. below board-v1.0.0), usage is probably limited to X60/X60s and X200/X200s sysboards.
Within this project’s git repository, versions are tagged according to the following pattern:
v<major>.<minor>.<revision>
<major> – The resulting product is a major change or upgrade.<minor> – Additional functionality or new features are introduced.<revision> – Bug fixes, minor changes, graphical stuff.A tag should be annotated with related change log entries.
The first tag should be: v0.0.0
Have fun with these sources!
Everyone should flash a free BIOS at least once in his lifetime ;-)
It is an exciting experience.
If you are in a hurry to apply Coreboot or Libreboot on your
machine, check #../doc/targets.md to see if it is supported
by kick, the first firmware. In addition, give kick2 and flashrom
a try, as flashrom has a huge database of chips.
To generate free firmware ROMs suitable for flashing, you might as well consider to use Zerocat Coreboot Machines.
NOTE: Changes related to hardware and software are tracked in separate files:
NOTE: Care has been taken to keep the software compatible with the RYF-certified “Chipflasher ‘board-edition-1’” (PCB: board-v1.1.0), so please feel free to upgrade its firmware.
The circuit board is the essential part of the flasher device.
This documentation should help you to build your own PCB or breadboard
circuit. Sources and CERN-OHL-S v2 license files are located in folder
../hardware/.
See #../doc/chipflasher.md to get started.
See ../kit-user-guide/doc/index.html to get help for the assembly
process.
connectUtility connect is part of this project,
for the board’s firmware needs someone to talk to.
The capabilities of a terminal, set up by propeller-load, are not
sufficient. Therefore, sample code had been used to start building
up connect. Now it is a small program that suits our needs, its
code is located in folder ../host/src/.
The utility is documented as part of this main documentation.
kickThe first firmware of the flasher board is called kick; its
source files are located in folder ../firmware1/src/. This firmware
is able to communicate with connect.
See ../firmware1/doc/index.html for its documentation.
kick2The second firmware of the flasher board is called kick2; its
source files are located in folder ../firmware2/src/. This firmware
is able to communicate with connect and flashrom.
See ../firmware2/doc/index.html for its documentation.
kick or kick2Related sections and files are:
Get started, quickly.
How to set up and operate “Chipflasher ‘board-edition-1’”
with connect and kick. This document is written for old flasher
board v1, but should still be useful.
../hardware/gschem/chipflasher-page13.sch.png
See how to attach an SPI chip. Don’t mix power and ground pins!
Operate the flasher with kick or kick2.
Learn how data is transmitted with connect.
Process connect’s incoming/outgoing ROM data.
NOTICE: Anyone modifying the design should provide brief information about the modifications, including the date they were made. Information about the design should be added but never removed from this file. According to section 3.3.b of the licence, licensees should provide a brief entry with a date and the nature of the modification for each design change. Please use markdown syntax! Example: ‘* 2020/04/26: AC/DC power converter circuit removed as AC input no longer necessary.’
2023/03/14: Improve GNU Guix Environment Setup
Improve guix/Makefile and the related manifest file to ease piped
invocation. Update code snippets within file README.md,
accordingly.
In file Makefile, adjust scale factor of gaf export to be
supported reliably: Turn floating point value into integer.
2023/02/02: Refine readability and reliability of make files, enrich guix manifest and README file in order to support utf8 terminal output, add missing license file.
2022/10/31: File pcb/board.pcb:
Add important vendor information for CONN1, which is a noname component of unknown manufacturer!
2022/10/26: File gschem/chipflasher-page06.sch:
Update attributes description and comment for MAX3232CPE.
2022/10/26: File gschem/chipflasher-page11.sch:
Fix alternate reset line description by changing cts to rts.
Update cable length.
2022/10/15: Chipflasher board-v2.0.0 design sources released!
2022/10/12: Add template file CHANGES.md, providing introductory notice.
The Zerocat Chipflasher Project comes with GPL’ed code, in general. However, as the GPLv3 fits perfectly for the purpose of software distribution, it seems to be not the best choice for the distribution of hardware design files and physical hardware.
The world of hardware is supposed to be more hostile against free software developers and enthusiasts. The fact that patents are still a common tool to restrict access and to empower individual control while removing rights from the public and even from origin developers, is a threat that has to be addressed.
The CERN Open Hardware License Version 2 – Strictly Reciprocal is supposed to set up the revolutionary rights to study, use, modify and distribute hardware design files on the one hand, but establishing protection against patent related threats for the developer and for users on the other.
As specified in FAQs, the CERN OHL is not compatible with GPLv3. However, in the author’s opinion, a combination of both licenses is possible as long as the realm of each license can be distinguished clearly.
To achieve this distinction, the scope of the CERN-OHL license is narrowed to the toplevel hardware folder’s content. The content is self-contained, that is, it should ship everything that is needed to create and work with hardware design files.
To give you a tool that helps you to set up a dedicated shell environment with
all prerequisites provided, the hardware folder contains a guix folder,
in which a Makefile, a guix channel description file, and a guix manifest
file can be found. With these files, you can easily setup a proper shell
environment to make make all work, as long as you are running the GNU Guix
System.
In order to comply with the license, dedicated license files have been set up
for the manifest file and for the guix channel description file. This
puts me into an uncomfortable position, as these files are basically
generated output of guix commands. Not much work that I have added, thus
not much content to justify a copyright statement.
Similar to this, some footprints had to be fixed and are now available from the project’s hardware/gschem/symbols folder, with author and dist-license attributes added, along with corresponding license files.
The CERN-OHL-S license comes with the concept of “Available Components”, as defined in section 1.7 of the license. Available Components may be used as is, with their corresponding license.
Examples:
The gEDA/gaf tool suite, which is a GPL’ed distribution, is used to edit circuit schematic files and symbol files for electronic elements. This tool suite is regarded as an Available Component, same as the symbol files that are shipped with it. However, schematic files and symbol files that are not shipped with it, are subject to the CERN-OHL-S license.
PCB is a PCB Editor Tool, which is as well GPL’ed. The distribution of PCB ships land patterns, or footprints, of electronic components. These footprints may be used as is, with their corresponding license. However, footprints that are not shipped with it, are subject to the CERN-OHL-S license.
If you think I am mistaken or in any way wrong, please let me know and help me to arrange this license pattern, correctly.
As far as I know, the authors of the CERN-OHL-S are asking the Free Software Foundation (FSF) to approve the license as a valid free software license. Let me express my hope that the FSF will do so in near future.
The FSF comes itself with a very important campaign, the Respects-Your-Freedom (RYF) certified hardware. As pointed out above, the licenses that are suggested by FSF still leave the origin, enthusiastic developers of Free-design Hardware with the risk of being invited into court, some day. Accepting the CERN-OHL-S or an improved, later version, would put developers into a stronger position and would hopefully boost the worldwide efforts of individuals to contribute.
As stated by the authors, the license text has been developed in the same spirit that empowers the Free Software Movement. That is, ethical aspects are a vivid part of it. I would appreciate if the name of the license could be changed in order to reflect this, i.e. replacing the term Open Hardware in favor of Free-design Hardware or Hardware of a Free Design.
– K. Mertens, Oktober 2022
If you are on GNU Guix System, use GNU Make to create a dedicated profile, once. This allows you to match your environment to the one used by Zerocat, thus yielding for bit-identical results:
$ make -C ../hardware/guix pull
Create a shell with all prerequisites set up:
$ make -C ../hardware/guix environment
To leave the shell and the environment, later on, when you are done with this project, type:
[env]$ exit
To list all available targets, type:
$ make -C ../../hardware/guix help
To remove this project’s handy guix profile, type:
$ make -C ../hardware/guix clean
This will remove symlinks only. If you want to remove the profile from your system, run the GNU Guix Garbage Collector.
To generate hardware design files, type:
[env]$ make -C ../../hardware/
To remove generated files, type:
[env]$ make -C ../../hardware/ clean
To get list of available targets, type:
[env]$ make -C ../../hardware/ help